Disclosed is a receiver for a navigation system of the Omega type which operates with pulse-modulated signals. The phase of received and local signals is compared by quantized pulses; phase equalization, commutating gate control, phase tracking, and synchronization of gate patterns with timed-sequence input signals are obtained by pulse insertion into, or deletion from, signal loops which contain phase detecting, sequential signal selecting, and readout control components. Phase coincidence is counted cumulatively and is electromechanically stored. Lane position is recorded by pulse insertion. Components are constructed and interrelated to reduce noise and improve selectivity to enhance the benefits obtained by pulsed operation control.

An analog feedback circuit for producing a null or zero output for two eir in-phase or 180.degree. out-of-phase input signals applied to the circuit. The dc control voltage is applied along with the first input signal to a multiplier whose output is summed with the second input signal in an operational amplifier to provide the amplitude and phase of the control voltage.

Frequency memory apparatus in which an input signal is stored in a regenerative oscillatory loop. The phase delay of the loop is adjusted during the time of the first recirculation of the pulse in increments of 90.degree. in one embodiment and increments of 180.degree. in another embodiment so as to concentrate the output power at the frequency of the input signal. Other illustrated features include a relatively long term multi-loop frequency memory, enhancement of the input dynamic range and elimination of a phase error problem in the first recirculated pulse.

A circuit for generating a common signal as a function of either of two reference signals comprises a pair of phase-locked loops which share an oscillator. Each phase-locked loop generates a control signal as a function of one of the reference signals. One or the other of the control signals is coupled to the oscillator which generates the common signal. A comparator compares the two control signals and generates a signal indicative of their difference. While the control signal generated by the first phase-locked loop is coupled to the oscillator, the difference signal is applied to the second phase-locked loop where it controls the generation of the second control signal to minimize the difference between the two control signals. While the control signal generated by the second phase-locked loop is coupled to the oscillator, the second phase-locked loop is nonresponsive to the difference signal. Thus when a switch of reference signals occurs even if they are of different phase and even if that phase is slowly time-varying, the circuit can lock to the new reference signal at a phase dictated by the phase difference between the two references at the instant of the switch without causing the oscillator output to undergo significant frequency or phase changes.