A bit switch for use in a digital-to-analog converter comprises three differential pairs of transistors. The first pair receives a digital input signal and a reference voltage signal. The second pair switches the bit current to either an output bus or to ground depending upon the state of the input signal. A third differential pair of transistors is coupled between the first and second pairs for minimizing adverse effects of fast input transitions and parasitic capacitance.

A conventional differential transistor pair is provided with a dynamic bias circuit. The input voltage signal for the differential pair is also full-wave rectified and the rectified signal is used to bias dynamically the differential pair while the input voltage signal is being applied. One or more bias transistors having a control electrode fed with the rectified signal is connected in series with the differential pair. The result is that as the input signal magnitude increases the amount of bias increases dynamically and increases linearly for larger signals. Desired responses other than linearity can be achieved by making the signal that is fed to the rectifier vary according to any predetermined function.

An operational amplifier having an extremely high gain-bandwidth product. The amplifier includes a gain cell with an active negative resistance circuit made up of two matched NPN transistors (18 and 20) with their bases cross-connected to their collectors, and with a differential pair of NPN transistors (14 and 16) having their emitters degenerated through the active negative resistance circuit. The value of the negative resistance is chosen to negate other resistance values in the denominator of a fraction expressing overall amplifier gain, which is therefore maximized. Since no PNP transistors are needed to maximize gain in the amplifier, NPN transistors can be used exclusively, and the amplifier can be more conveniently fabricated in integrated-circuit form, with a desirably wide bandwidth.

A high speed, impedance sensitive, amplifying, switch driver including an input terminal for selectively receiving a first input signal of a first voltage accompanied by a high impedance state and a second input of a second voltage accompanied by a low impedance state; an output terminal for presenting first and second amplified switching signals corresponding to the input signals; an output stage including first and second semiconductor means each having a first load electrode connected to the output terminal for ultimately selectively producing the first and second switching signals; an intermediate switching stage including third and fourth semiconductor means each having a first load electrode connected in common to the control electrodes of the first and second semiconductor means for alternately selectively turning on one of the first and second semiconductor means and turning off the other; and an in output stage including means for alternately, selectively, biasing one of the second and third semiconductor means in a low conduction state and the other in a high conduction state in response to the first and second input signals.

The multi-channel amplifier is placed on a common substrate to form a hybrid circuit network, for example a common silicon chip. A source of control voltage is provided connected in common to the base terminals of a pair of transistors, which have their emitters coupled together. The output is taken from the collector of one of the transistors via an emitter-follower transistor. The commonly connected emitters of the pair of transistors are connected through a current supply source forming a third transistor to a source of operating voltage.