An electronic circuit for driving a mechanical oscillatory system with stabilization of the amplitude of the system includes a working transistor having a working winding in its emitter-collector circuit and a control winding in its base-emitter circuit, with its working point being determined by a voltage divider having a tap connected to its base. A second transistor is provided and its emitter-circuit forms one branch of the voltage divider, with the control winding being also connected in the base-emitter circuit of the second transistor. Thereby, control signals of the control winding, effecting modulation of the working transistor, simultaneously effect modulation of the second transistor in dependence on the amplitude of the oscillatory system. The transistors may be identical or may be complementary. When the transistors are complementary, the control winding is connected between the bases of the two transistors.
An oscillator circuit in a semiconductor substrate of an integrated circuit, includes a gain correction circuit portion connected between the output terminal of the feedback circuit portion and the input end of the amplifier circuit portion composed of MOS transistors. The gain correction circuit portion suppresses the excessive amplitude of the output signal of the feedback circuit portion, so that the characteristic of the waveform of the output signal of the oscillator device is improved.
A circuit for use with a PC16550D UART in 16450 polling mode that will filter DR bit oscillations. The circuit latches the value of the Line Status Register during the valid data portion of a LSR register read cycle, deasserts the read strobe, delays to allow the data bus values to float, applies the latched values of the LSR to the data bus, then asserts a ready signal to the microprocessor. If the UART access is not a read cycle to the LSR, the delay time is bypassed and the UART access cycle proceeds normally.
