Electrical resistor of semiconductor material formed in the thickness dimension of a high-resistivity substrate underlying an epitaxial layer of the same conductivity-type. A region of the opposite conductivity-type in the substrate, contiguous with the epitaxial layer, extends laterally across all but a predetermined area of the substrate in conjunction with the resistivity of the substrate material determining the resistance value of the resistor. Semiconductor devices and other circuit elements may be formed in the epitaxial layer in accordance with known techniques, the resistor being in series with any desired ones of the additional elements.
A large value resistor is formed during the standard processing steps in the fabrication of a monolithic integrated circuit device, the resitor being formed by a vertical channel FET, the channel of the FET being formed during diffusion of the isolation regions for the device, this diffusion extending down through the epitaxial layer of the device and through a channel defining opening in a buried layer region between the epitaxial layer and the substrate of the device.
An isolation diffusion process monitor is disclosed. A monitor resistor which has one end terminated in an isolation diffusion region is measured during the wafer fabrication process. Its value will be a function of the lateral surface extent of the isolation diffusion.
A buried load device in an integrated circuit extends between two regions of like conductivity isolated from each other by thick oxide and substrate comprises a channel beneath the oxide and having dimensions defined by a diffused region of opposite conductivity type. The buried channel is formed by impurity migration from an upper epitaxial layer that is oxidized to separate two regions and the connecting channel width is defined by diffused strip regions of opposite conductivity to establish a desired current-voltage relationship thereof.
A diffusion resistor is provided that utilizes the block mask to cover only the intrinsic polysilicon gate region. The n-type source/drain doping is implanted in the contact regions, but not in the intrinsic polysilicon gate region. A N-type (or P-type) diffusion resistor in P-well (or N-well) is provided that utilizes a block mask to cover only the intrinsic polysilicon gate region. The N-type (or P-type) source/drain doping is implanted in the contact regions but not in the intrinsic polysilicon gate region. The P-well (or N-well) block mask is used to keep the P-well (or N-well) from forming under the buried resistor. This makes the parasitic capacitance of the diffusion junction very low. Also provided is a buried capacitor and method of making both a buried resistor and a buried capacitor.
