A digital clock circuit particularly suited for monolithic integration wherein the counting rate of the clock is variable from a normal to a faster rate in response to the level of a 60 Hz voltage derived from the power line and applied to a single input terminal as a clock reference signal.
An electronic timepiece having a pulse generator for producing a high frequency time standard signal, a divider circuit for producing low frequency timing signals in response to said time standard signal and a device for digitally displaying time in response to said timing signals, is provided with an alarm adapted to be actuated at a predetermined time. The timepiece includes a memory device for storing said predetermined time, a comparator device for comparing the stored predetermined time and the instantaneous information in said divider means and a device for driving said alarm in response to the output of said comparator device.
A driving arrangement for liquid crystal displays for timepieces wherein the relatively low voltage of a battery is stepped up in response to the oscillating frequency of the time standard oscillator for application to the liquid crystal displays. Where said time standard vibrator is a piezo-electrically driven tuning fork type vibrator, the driving signal for said vibrator is also obtained from the secondary of the step-up transformer.
An electronic timepiece with a time signalling device wherein to the time signalling device is applied an output signal with a predetermined frequency which is produced from one of a plurality of cascade connected, bistable multivibrator stages in a divider which is used for dividing a high frequency signal into a standard time signal of low frequency. Further, a plurality of output signals produced from the corresponding stage are periodically and alternately applied to the time signalling device for enhancement of the tone of the time signalling sound.
The present disclosure is directed to an electronic digital clock made up of electronic components without using a chain of counters. The digital clock utilizes shift registers with a recirculation path for storing the time information as to hours, minutes and/or seconds and a computing circuit for repeatedly adding the time information one by one in accordance with a predetermined clock base frequency.
The display is controlled by a device supplied by the same battery as the timing base of the timepiece. The signals produced by the timing base are then sent to a voltage elevating device through an amplifier. Afterwards they are rectified, hacked and pulsed to a liquid crystal cell having an electrooptic effect and displaying the time indications.
