A method for determining whether test probes of a test fixture on an automatic test equipment (ATE) device are in contact with the intended test points on an electronic assembly under test. The undetected failure of the test probes to contact the test points on the electronic assembly test, such as a printed circuit board can result in meaningless test results or lead to unnecessary further testing or replacement of nonfaulty components that tested as failed. The method is directed to detecting which test probes are not in contact with their corresponding test points on the electronic assembly undergoing test by ATE.

LSI (large scale integration) semiconductor chips have two sets of Schottky diodes formed therein for assuring electrical contact between the chip voltage supply and I/O (input-output) signal contacts (or pads) and test probes. The diodes of one set form an AND circuit having the diode inputs coupled to respective chip input signal contacts. The other set of diodes have first terminals coupled to the output of the AND circuit, and have second terminals, each coupled to a respective chip output signal contact. When a plurality of test probes are brought into contact with the chip I/O and voltage supply contacts preliminary to running static and/or dynamic tests on the chip circuits, a selected signal level is applied concurrently to all probes which are connected to chip input signal contacts and to probes connected to the supply contacts. If there is good electrical contact between these probes and each of the input and supply contacts, a selected signal level (e.g. UP) appears at the output of the AND circuit. This output signal is then applied by the AND circuit (or an amplifier) to each of the chip output contacts via a respective diode in said other set, irrespective of the states of the functional logic on the chip. If good electrical contact exists between the chip output contacts and their respective probes, the UP output signal level will appear on all of the latter probes. Detection of the UP signal level on all of the latter probes indicates good contact between all probes and chip contacts. Once this is established, functional testing of the chip circuits can begin.

The invention relates to switching apparatus having a pair of input terminals (102, 104) and 2.sup.P pairs of output terminals (106a, 106b). The switch comprises p rows of switches K.sub.i,j with the ith row having 2.sup.i unit switches. It also comprises a control circuit (108) which enables the state of all the switches in a given row to be controlled together, thereby enabling the pair of input terminals to be connected to any pair of output terminals.