A differential amplifier comprising a first amplifying circuit including a dual emitter transistor, a second amplifying circuit in parallel with the first amplifying circuit and having a second dual emitter transistor with one of its emitters coupled to one of the emitters of the first transistor and a potentiometer having a resistance element with one end coupled to the other emitter of the first transistor and its other end coupled to the other emitter of the second transistor and its wiper contact coupled to the commonly coupled emitters whereby the collector currents of the first and second transistors can be selectively adjusted by adjusting the potentiometer of the wiper contact relative to the resistance element.
An offset adjustment circuit for a differential amplifier includes a current source connected in series with a resistor for establishing a biasing voltage for a pair of field effect transistors (FET) having variable resistors in their biasing circuits. These FET's are connected to introduce currents respective connections between an input stage and a second stage of the differential amplifier. The difference of the currents supplied by the FET's divided by the transconductance of the input stage of the differential amplifier corresponds to an offset which remains fixed with changes in temperature. The offset introduced by the FET's, as determined by the adjusted values of the resistors in their biasing circuits, may be in opposition to the offset of the differential amplifier to either reduce it partially or completely, or it may be additive to the offset of the differential amplifier, as desired.
An electrode (12) for sensing a surface potential is connected to a non-inverting input of an operational amplifier (14). The output of the operational amplifier (14) is connected to the inverting input thereof in a voltage follower configuration. The output of the operational amplifier (14) is also connected to one or more shield electrodes (19) which are operatively disposed adjacent to the sensing electrode (12). An offset bias voltage of the operational amplifier (14) is adjusted to cancel an input bias current thereof. An operational amplifier (33) may be mounted on a flat substrate (112), with sensing and shield electrodes (113), (114), (116) formed on the substrate (112) by printing. The shield electrodes (114), (116) surround the sensing electrode (113) and also the operational amplifier (33).
A signal processor which provides non-linear transfer functions provides a processor output and non-linear inflection points that are referenced to a common bias. The processor output and the non-linear inflection points each exhibit rejection to time variant common-mode variations.
A differential amplifier is provided with a short response time by output circuitry which combines each component of an intermediate differential signal, generated via known techniques, with an auxiliary signal component in phase therewith. The output circuitry illustratively comprises a pair of multi-emitter output transistors. Each component of the intermediate signal and the component of the auxiliary signal in phase therewith are provided at respective emitters of one of the output transistors.
