A clocked bootstrap inverter circuit including an inverting amplifier, an active load for the inverting amplifier including a capacitive bootstrapping circuit, a biasing circuit responsive to a first clocking signal and a second clocking signal 180.degree. out of phase with the first clocking signal, and an amplifier disabling device responsive to a third clocking signal which is more than 180.degree. out of phase with the first clocking signal. The biasing circuit alternately activates and inactivates the active load while the disabling device alternately disables the amplifier and provides a small time delay for allowing the bootstrapping circuit to be precharged.
A field effect transistor amplifier having a bootstrap bias voltage circuit which is isolated from the output. Isolation of the bootstrap bias voltage circuit allows a plurality of amplifiers to be connected in series to provide a higher bootstrap bias voltage than could be provided by a single bootstrap bias voltage circuit.
A clocked buffer circuit is provided which uses a self-bootstrapping transistor to provide a full power supply output signal in response to an input signal and a full power supply clock signal. The self-bootstrapping transistor is disabled by a delay circuit prior to the removal of the clock signal so that the output signal is still provided after the removal of the clock signal. That the output signal reaches full power supply is ensured because the disabling effect of the delay circuit is triggered by the output signal itself.
A random access read/write MOS memory device or the like employs a clock driver circuit which includes a push-pull type output stage with two transistors having a clock .PHI. and its complement .PHI. as gate inputs. An output node is pulled to a full supply voltage level by a pump transistor connecting the output node to the supply and having a delayed clock coupled to its gate. Another transistor with the supply voltage on its gate connects the output node to the gate of the pump transistor.
A bootstrap circuit in which a load MOS transistor and a drive MOS transistor are connected in series between a high potential source and a low potential source to form an inverter, a capacitor is connected to an output terminal of the inverter, and a circuit for charging the capacitor and a circuit for discharging the capacitor are connected to the capacitor, the circuit for discharging the capacitor being connected between said capacitor and the low potential source and containing a MOS transistor which is rendered conductive by a reset signal applied to its gate. The present invention involves another MOS transistor having its gate connected to the high potential source being inserted between the MOS transistor in the discharge circuit and the capacitor.
A uniquely arranged, clock-controlled integrated circuit is disclosed as a building block for implementing Boolean logic functions. The circuit has a minimum number of components and a design to yield a low cost, high speed operation. The circuit may also include an efficient signal inversion and amplification stage, where such is required.
