An improved three-state logic circuit for selectively providing active sourcing, active sinking or high impedance isolation of the circuit output terminal so as to develop "true" output, "false" output or third state, high impedance output signals. A first T.sup.2 L data input circuit selectively drives, through a buffer stage, an active pull-up circuit and an active pull-down circuit in response to logic input signals, and a second T.sup.2 L output disable circuit cooperates with the buffer stage to selectively disable the active pull-up and pull-down circuits in response to a disable signal.
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The present application is a continuation application of copending U.S. patent application Ser. No. 108,359 filed Jan. 21, 1971, and now abandoned, and assigned to the same assignee as the present invention.
An output circuit which has an improved protection circuit against an abnormal voltage applied to an output terminal. The output circuit is of the type having first and second switching transistors operating in a push-pull manner, the output being derived from the intermediate connection of the first and second switching transistor. A protection circuit is coupled between a gate of the first switching transistor and the output terminal. The protection circuit provides a current path between the gate of the first switching transistor and the output terminal when an abnormal voltage is applied to the output terminal.
Dotting capability is provided in a push/pull active collector type circuit by providing a clamping circuit to limit the current through the pull-up transistor and prevent current flow through that transistor when the output is pulled down via another driver.
A novel sense amplifier circuit providing conversion of MOS input signals to TTL output signals with tri-state logic output at the output data bus, the input circuit of the sense amplifier providing current sensing and programmable input thresholds for economical construction and enhanced speed of operation of the sense amplifier. A novel tri-state operation is provided for the input section of the sense amplifier to provide either a clamped voltage at the input data bus line during MOS to TTL communication or a floating input when it is desired that MOS devices on the input data bus are to communicate.
An interface driver circuit, for use in a programmable energy load controller system, comprises a pair of optically-coupled input sections, respectively receiving data and a special signal of digital nature and a first voltage polarity. A buffer amplifier section is coupled to the data input circuit for driving a twisted-wire transmission line, coupled to the paralleled inputs of a plurality of receivers, with logic signals alternating essentially between ground potential and the first voltage at the first polarity; a second amplifier section is enabled by the special signal input section and impresses a voltage of the remaining polarity across the interface driver circuit output when commanded at the special signal input, regardless of the state of the data signal at the first input.
A current mirror transistor is included in a tristate logic buffer circuit, with its base and emitter respectively connected to the base and emitter of the phase splitter transistor and its collector connected to the voltage supply terminal. A high resistance connected between the voltage supply terminal and the collector of the phase splitter transistor causes the circuit to consume less power when the circuit is disabled; and the current mirror transistor supplements the drive current provided by the phase splitter transistor when the circuit is not disabled.
