A circuit in which signal gain is controlled independently of the quiescent direct current level. The quiescent current flows through a transistor connected as part of a constant current circuit and is modulated by signals applied to the base. The constant current circuit is connected in series with a pair of differentially connected transistors, both of which are connected in series with the load. The percentage of the total direct current through the differentially connected transistors is controlled by a direct signal applied to one of them. A current through that transistor also flows to the constant current circuit through a diode, the impedance of which is controlled by the magnitude of the direct current through it. The diode, the constant current circuit and a capacitor are connected in a second loop, and part of the signal circuit flows through this loop in a magnitude determined by the impedance of the direct current biased diode. The remainder of the signal current and all of the quiescent direct current flow through the load. Thus, the amplitude of signal voltage across the load is controlled by the percentage of direct current that biases the diode. The capacitor may be eliminated by duplicating the remainder of the circuit and connecting the duplicate parts as a differential and amplifier system.
A gain control circuit of the balanced type whose gain is linearly controllable over a wide range and wherein the DC level at the circuit output is maintained at a constant value regardless of variations of the controlling current. The gain control circuit is comprised of a first differential amplifier which receives an input signal differentially applied thereto, and a second differential amplifier connected in series with the first differential amplifier. Unidirectional conductors are connected to the outputs of the first differential amplifier as a load impedance and variable currents are supplied to the first differential amplifier outputs to control the currents flowing in the unidirectional conductors and thereby vary the load impedances presented by the unidirectional conductors. The amplified output signal is derived from an output of the second differential amplifier.
An apparatus reducing non-linearity in an output signal presented at an output locus of an amplifier device having an output unit coupled with the output locus, the output unit having at least one first operating characteristic contributing to the non-linearity, includes a compensating unit coupled with the output locus. The compensating unit has at least one second operating characteristic cooperating with the at least one first operating characteristic to effect the reducing.
A cascode type transistor amplifier circuit having an improved signal-to-noise ratio characteristic, wherein a parallel circuit which consists of a resistance of comparatively large value and a diode is disposed on the emitter side of one of a pair of differential transistors and wherein a variable absorption current circuit is disposed on the emitter side of a grounded-emitter amplifying transistor, the absorption current of the variable absorption current circuit being controlled so as to decrease with increase in the input signal level.
A high speed laser driver includes a differential pair of bipolar transistors sharing a common emitter resistor as in the prior art. However, an improvement thereover resides in the use of Schottky barrier diodes, one of which couples the emitter of one transistor to the common emitter resistor and the other of which couples the emitter of the other transistor to the common emitter resistor. Furthermore, separate resistors couple the emitters of both transistors to a voltage source so that the transistors are always conducting. A high speed logic circuit includes a pair of input bipolar transistors, and a reference transistor, sharing a common emitter resistor as in the prior art. However, an important resides thereover in the use of Schottky barrier diodes that couple the emitters of the transistors to the common emitter resistor. Furthermore, separate resistors couple the emitters of the three transistors to a voltage source so that the transistors are always conducting. Schottky barrier diodes are used in the emitters of ECL logic circuits, substantially increasing switching speed.
In an amplifier stage a first FET receives the input signal at its gate electrode. The drain of the first FET is connected to the drain of a second FET, and both drains are connected to the same drain voltage supply. The amplifier stage output is from the drain of the second FET. A third FET has its drain connected to the drain voltage supply and its source connected to the reference voltage supply. The physical characteristics of the third transistor are selected to produce a voltage of a fixed value that is applied as a bias to the source of the second transistor to compensate for an offset of the amplifier stage input signal voltage. A fourth FET has its drain connected to the drain voltage supply and its source connected to the drain of the third FET. The drain of the fourth FET is connected to the gate of the second FET. The physical characteristics of the fourth FET and the current flowing through it determine the gain of the amplifier stage. The third and fourth FETs are not in the signal path. Several stages can be connected in cascade with only one pair of said third and fourth transistors connected to the source and gate of the second transistor of each stage.
