Apparatus for phase keying in frequency and phase voltage controlled oscillator with an incoming signal having a T period phase coded of the biphase PCM or PSK type. The apparatus comprises a circuit loop for phase controlling the oscillator with logic circuitry and first and second conductive paths. Each of the first and second conductive paths have integrators. The integration time of the first and second integrators is equal to the period T of the incoming signal. The limits of integration of the first integrator are - T/8 and + 7T/8 and the limits of integration of the second integrator are + T/8 and + 9T/8. A delay element is disposed between the logic circuitry and the second conductive path introducing retardation time of T/4.

A circuit arrangement for the production of a control signal, in particular a level regulation signal, in a receiving channel which is subject to interference, forms an amplitude-dependent control signal from the phase coded input signal. In the receiving channel a frequency regulating circuit has an oscillator which is synchronized by means of the received signal and the received signal is superheterodyned with the output signal of the oscillator in one mixer, directly, and delayed by 90.degree. in another mixer. The mixed products are then fed through low-pass filters to obtain signals which indicate the frequency shift between the input signal frequency and the oscillator frequency, which signals are converted in a third mixer and serve for tuning the oscillator. The output signals obtained from the outputs of the two first-mentioned mixers, after being fed through low-pass filters, are squared and combined in a difference stage. The result is again passed through a low-pass filter and squared again before being fed to an addition stage. One input of the addition stage is obtained from the output signal of the third mixer, after squaring, and an amplitude correction stage is provided in front of another input of the addition stage to effect cancellation of the signal components arising from phase errors of the frequency regulating circuit and from the noise components in the useful signal. The interference-free output obtained is used as the control signal.

A phase synchronizer for a reference carrier signal reproduced in a receiver for a combined amplitude and phase modulated signal comprises a window specifier for specifying windows for preselected ones of true signal points of which the demodulated signal is selectively representative. The phase synchronizer includes a demodulator for producing complex signals representative of coarse signal points so long as the reproduced carrier signal has a phase error which falls within the windows. Differences between the true points and the coarse points falling within the windows are calculated and summed up to produce a control signal for reducing the phase error substantially to zero.

A signal estimator estimates a transmission signal series using Viterbi algorithm, and outputs an estimated signal and a minimum path metric signal. A switching unit is controlled by a control signal in such a manner that, for a certain period from the start of the operation of PLL which requires quick response, a minimum path metric history signal is selected, while, in the other case, an estimated signal is selected. A replica generator generates a replica signal using a signal output from the switching unit. The generation of the replica signal using the path metric history signal offers quick response, but on the other hand, the accuracy is low. On the other hand, the use of the estimated signal offers high accuracy, but on the other hand, the response speed is low. Thus, a phase change contained in a received signal is corrected in a highly accurate and quick manner.

This invention concerns a carrier synchronization system for a four-phase coherent PSK demodulator. The four-phase PSK signal is demodulated by an in-phase reference carrier and a quadrature reference carrier both of which are locally generated by a reference carrier source. The in-phase and quadrature components of the four-phase PSK signal that result from these demodulation operations are delayed a time interval substantially equal to T/2 seconds, T being the signaling period. The product of the delayed in-phase component and the sign of the quadrature component is compared with the product of the delayed quadrature component and the sign of the in-phase component, to produce a phase error signal. This error signal is used to control the adjustment of the reference carrier source.