A GaAs mosfet comprises a p-type gallium arsenide single crystal having two grooves formed therein, each groove containing a layer of indium, a layer of dopant overlying the indium and a layer of Al.sub.2 O.sub.3 overlying the dopant, each groove overlying a respective n.sup.+ region of the gallium arsenide, the surface of the gallium arsenide single crystal on each side of each groove comprising native oxide to a depth contiguous to the n.sup.+ regions, and the layers of dopant being in contact with the junctions between the n.sup.+ regions and the native oxides. A flat contact pad covers the native oxide between the grooves and is in contact with the Al.sub.2 O.sub.3 of both grooves, a second contact pad covers the native oxide on the remaining side of one groove and is in contact with the dopant via an electrically ruptured part of the Al.sub.2 O.sub.3 of that one groove, and a third contact pad covers the native oxide on the remaining side of the other groove and is in contact with the dopant via an electrically ruptured part of the Al.sub.2 O.sub.3 of that other groove.

An improved interconnection structure and method for forming the interconnection in a semiconductor device having multilayered interconnection structure in which a contact hole for electrically connecting a first layer interconnection to a predetermined region of a semiconductor substrate and a through hole for electrically connecting a second layer interconnection to the first layer interconnection are formed in the regions overlapping with each other in planer layout. In the interconnection structure of the present invention, hillocks effective to compensate for the contact hole step are formed in the first layer interconnection only in the region of the contact hole of the first layer interconnection. In the method for forming the interconnection according to the present invention, a first layer interconnection is formed and a chemical conversion process is selectively performed to form a film which is more rigid than the first layer interconnection film on a predetermined region of the first layer interconnection film, and then a heat process is performed to generate hillocks only at the region of the contact hole of the first layer interconnection film. The second layer interconnection film is formed thereafter.

A method of forming an integrated circuit comprising forming a plurality of modules on a chip. In addition, a plurality of conductive bond regions are formed adjacent the chip. Further, selected bond regions are coupled to selected modules such that a subset of the plurality of modules may be accessed by the selected bond regions.

A monolithic flip chip microwave integrated circuit module formed using titanium coated copper circuitry and a processing method. A dam is formed on a substrate by forming a thin protective layer such as titanium or other metal on a copper layer formed on a surface of the substrate to which a monolithic microwave integrated circuit is to be attached. The protective layer is oxidized upon exposure to air. Vias or openings are then formed in the oxidized protective layer. Solder is disposed in the openings in the oxidized protective layer, and is confined to the openings while solder is reflowed to attach the integrated circuit to the substrate. The oxidized protective layer serves a dual function that provides both a solder dam and a protective coating for the underlying copper circuitry. Copper surfaces not covered by the oxidized protective layer may be environmentally protected by depositing a thin layer containing electroless plated nickel and electroless plated gold.

A semiconductor device includes a first metallization pattern which is sunken into a portion of a first insulating layer on the semiconductor body. This first metallization pattern is sunken through only a part of the thickness of the first layer and its surface substantially coincides with that of the first layer. The first metallization pattern and first insulating layer are covered with a second insulating layer, and a second metallization pattern is provided on the second insulating layer. In order to provide contact with desired regions of the semiconductor device, the second metallization pattern extends through contact holes in the underlying second layer to provide the desired electrical connections. This configuration results in a flatter, more efficient and at the same time a more reliable multiple-layer metallization system.