An electronic circuit for correction of the time display on an electronic timepiece, this circuit including a selector switch having a rest position for which the timepiece advances normally, and operating positions for minute setting, hour setting and day setting. Delay means are connected between said selector switch and the setting means of one or more display means for minutes, hours or days in order that such setting means only start to operate when the selector switch has been shifted to the operating position for a sufficiently long time, but are inoperative if the selector switch is rapidly shifted through this operating position.
An electronic digital watch including a device for enabling the correction of the minutes and seconds display. The device includes a delay circuit which only enables a correction to be effected if the push-button for correcting the display is actuated for a predetermined time, and means for resetting the seconds display to zero and, if the watch is slow, advancing the minutes display by one.
An electronic timepiece includes frequency-dividing circuit means for generating a first signal of at least 1 Hz from a signal of a predetermined frequency. This first signal is counted by a time counter. The frequency-dividing circuit and the time counter are reset in response to the closing of a first input switch. Circuitry is provided for releasing the frequency-dividing circuit from its reset condition to generate a second signal of at least 1 Hz as a quick advance signal for time setting in response to the closing of a second input switch.
An electronic watch having a circuit for permitting it to be stopped in a state of minimum consumption. The watch has an oscillator, a frequency divider comprising flip-flops and a display, with the display and at least some of said flip-flops being connected to a common line so that a signal applied to the common line places them in a state of minimum consumption. The circuit including a switch connected between the common line and a terminal of the power supply and at least two MOS transistors connected so as to apply the signal to the common line when the switch is closed.
The circuit comprises a counter (13), a generator (11) that produces a reference signal (Sf) made up of pulses, and a two-input AND gate (10). One input of the AND gate is connected to the generator while the other input receives a signal (Sx) produced by a bouncing contact (X) as it switches from an open position to a closed position and vice versa. The output of the AND gate is connected to the clock input (C113) of the counter, which further has a reset input (R13) connected to the output of an inverter (14) whose input receives the signal produced by the contact. Opening of the contact causes the reference signal to be blocked by the AND gate and the counter to be reset. Closure of the contact causes the AND gate to open to the reference signal whose pulses then increment the counter and the latter, upon its contents reaching a predetermined value, issues an output signal (S13) in the form of a pulse.
A control device for an electronic wrist watch to enable selection of a variety of possible displays. The circuit of the device incorporates means for memorizing an input control signal derived from a pushbutton and logic and delay means for combining the input control signal and the information in the memory means to provide outputs according to the period for which the pushbutton is actuated. The outputs can be used to selectively connect counters to the display means of the watch.
