A Multiprocessor computer system in which each processor has a fault channel which can be accessed by another processor of the system, thereby permitting operation of the former processor to be monitored by the latter. The fault channel effectively provides the latter processor with all the facilities which are provided to a human operator by the control console of a conventional computer. Each processor is arranged to open its fault channel, and issue a request for attention by another processor, whenever a fault is detected by it.
In a data processing system comprising a plurality of systems each including a plurality of console type typewriters for establishing communications pertaining to data processing operations between an operator and the system, the communication information which is entered into and derived from a central processing unit in each system by the console type typewriter is stored in a character buffer unit corresponding to the console type typewriter in a monitor transfer control unit, and a buffer scanning unit scans the character buffers to transfer the contents therein into a statistical analyzer or processing unit so that communication information may be automatically analyzed and summarized to obtain the data per day or month required for determining whether or not the data processing system has been effectively operated.
In a current-spare switching control system provided for a data processing system having a current data processor, a spare data processor, a fault supervisor for supervising the fault of these processors, and switching units for switching from the current data processor to the spare data processor or vice versa, the current-spare switching control system includes: a storage unit for temporarily storing data bits from the fault supervisor; a discrimination unit operatively connected to the storage unit and for comparing the data bits with a reference signal and outputting a coincidence signal when the data bits coincides with the reference signal; an AND gate operatively connected to the discrimination unit for inputting the coincidence signal and a write command from the fault supervisor, and outputting a write signal when the coincidence signal coincides with the write command; a register unit operatively connected to the AND gate for inputting a data bit from the fault supervisor and outputting a switching signal to switch from the current data processor to the spare data processor or vice versa.
In a multiprocessor system having a main memory and a plurality of processors connected through common address bus, data bus and answer bus for data transfer, a data transmission apparatus is provided for each of the main memory and the processors and includes bus request control lines for transferring bus request signals and bus control signals, and a bus controller for separately controlling selections of the address bus, the data bus and the answer bus in response to the signals on the bus request control lines and the request signal. Overlapped processing such as data write and data write answer or data read and data read answer in one cycle is possible.
A data processing apparatus controls cross-triggering of diagnostic processes on a plurality of processing devices. The data processing apparatus comprises a routing module having a plurality of broadcast channels, one or more of the broadcast channels being operable to indicate the occurrence of a diagnostic event on one or more of the plurality of processing devices. The data processing apparatus also comprises an mapping module associated with a corresponding processing device. The interface module programmably asserts diagnostic event signals from the associated processing device to one or more of the plurality of broadcast channels and programmably retrieves diagnostic events signals from processing devices other than the associated processing device from one or more of the plurality of broadcast channels. The retrieved diagnostic event data is used to facilitate triggering of a diagnostic process on the associated processing device in dependence upon said retrieved diagnostic event data.
A Fault-Tolerant Multi-Computer System for control applications is disclosed. The system has a plurality of Computers (10a-10n), each having an assigned set of tasks which it is capable of executing. No one Computer in the system acts as a master and no one Computer executes all of the tasks. Communication between the Computers is by individual communication links (16, 18, 20) over which each Computer sends information directly to all other Computers in the system. Each Computer comprises an Applications Computer (100) and an Operations Controller (200). The Operations Controller receives messages over the communication links and selects, from the assigned tasks, the tasks to be performed by the associated Applications Computer. Each Operations Controller includes a fault handler which checks the messages received from the other Computers. The fault handlers send and receive error messages, over the communication links, to assist in the identification of a faulty Computer. Subsequent messages from the Computers deemed to be faulty are ignored, and the tasks assigned to the faulty Computer are executed by alternate Computers in the system.
