A current mirror amplifier using a first and a second transistors with parallelled base-emitter circuits and collector electrodes connected to input and output terminals, respectively, includes a degenerative collector-to-base feedback connection with high current gain. Accordingly, input and output direct currents can be accurately proportioned without an inaccuracy caused by base current flows. The feedback connection may comprise a cascade connection of a third transistor and a fourth complementary conductivity transistor, each connected in common-emitter amplifier configuration.
A current mirror amplifier in which the potentials appearing across the principal conduction paths of its master and slave transistors are maintained substantially the same. This is done by a differential-input, single-ended output amplifier, which is connected as a non-inverting amplifier in the direct-coupled feedback connection that conditions the master transistor to conduct applied input current via its principal conduction path.
A radio frequency (RF) pulse power amplifier biased with a relatively low supply voltage generates one or more RF pulses having a relatively large output power. The RF pulse power amplifier may be configured as a push-pull power amplifier operating in class D mode including first and second sections, balanced-to-unbalanced (balun) transformer, and a load resistor coupled across the output winding of the balun transformer. Each section has a current source providing bias current, a MOS transistor, and a pair of bipolar transistors. Each section receives its input digital signal at the MOS transistor, which acts as a current switch for a bias current from a current source. With a relatively small voltage change in response to the input digital signal, the MOS transistor switches the bias current between itself and a transistor pair used to drive the corresponding half (input winding) of the balun transformer.
A push-pull output stage for electronic integrated circuits includes two NPN transistors (Q1, Q2) connected in series between two supply terminals. The output (S) is the junction point of the transistors. A third NPN transistor (Q3) has its base and its collector connected respectively to the base and to the collector of Q1. Two current flow arms (R1, Q4 and R2, Q5) are formed, one to establish a current depending on the potential of the emitter of Q3 and the other to establish a current depending on the potential of the emitter of Q1. The arms are mounted in a current mirror arrangement, the second arm tending to copy the current of the first arm; the current mirror generating a current output (S2) representing a difference between the current set up in the second arm and the current copied from the first arm. This current output is used to control the conduction of the second transistor (Q2). Thus, there is obtained an output stage using exclusively NPN transistors and having, at the same time, greater linearity than that of prior art devices.
An improved amplifier of the type comprising bipolar transistor means coupled between the input terminal of the amplifier and a differential pair of transistors. Compensation means is provided for generating a compensating signal through the bipolar transistor means such that the bipolar transistor means and compensation means reduce the amount of bias current drawn from the input signal to the amplifier. Other aspects of the present invention include the provision of reducing DC offset voltages between each side of the differential amplifier due to the operation of the device with its input terminals at different voltage levels, and the provision of a zero in the transfer characteristics of the amplifier to mitigate the effects of poles provided in the transfer characteristics.
A current mirror circuit comprised of three transistor devices, each transistor device including an input terminal and first and second output terminals. Two of the devices have their input terminals connected together and one output terminal of each device is connected to a respective current output terminal. The other output terminal of each device is adapted to be supplied with an operating voltage. Each of the first and second transistor devices is formed of at least a pair of transistors connected in Darlington-type configuration. In one embodiment, these Darlington-connected transistors are of complementary types. The third transistor device has its input terminal coupled to one of the current output terminals and one of its output terminals coupled to the common-connected input terminals of the first and second transistor devices. The remaining output terminal of the third transistor device is coupled to a reference potential. The third transistor device also is formed of at least a pair of transistors connected in Darlington-type configuration. In one embodiment, a current feedback resistor is connected to one output terminal of each of the first and second transistor devices. In another embodiment, each of the first and second transistor devices includes one transistor whose base is supplied with current by another transistor, this base being coupled to the current output terminal by a bias resistor.