A storage device (hereinafter referred to as a high speed store) includes a plurality of registers or locations and has an access speed compatible with that of its processor. Operand and operator entries are entered into one group of said registers in descending and ascending order from opposite ends thereof (a push operation) and removed therefrom (a pop operation) for processing each entry type in a last-in-first-out order. The group of registers is hereinafter referred to as a high speed stack. The number of entries stored in the stack at any moment can become very large due to the nesting of operators. Since it is not economically feasible to provide a large capacity high speed stack, overflow of the stack into a slower speed storage device (hereinafter called a low speed stack) is provided. "Roll out" of entries to the low speed stack and "roll in" of the entries back to the high speed stack is effected as the high speed stack becomes full and empty. When a new entry is to be stored into the high speed stack (a push operation) and the stack is full after the entry is stored therein, the entries are rolled out from the high speed stack to the low speed stack. Pointers (stack addresses), together with their pointer registers, pointer updating circuits and pointer controlled logic, automatically select the stack registers as entries are pushed thereon and popped therefrom. When entries are rolled out, the pointers are rolled out with the entries and the pointer registers are reinitialized. When the entries are subsequently rolled in, their pointers are rolled in and set in the pointer registers. Hardware is provided for reserving some of the high speed stack registers for direct addressing by instructions rather than by the automatic pointer addressing mechanism.
A method for performing consecutive instructions to push data onto a stack in memory in a digital computer is described. During a first clock cycle, an instruction is decoded requiring a stack push operation. A control indicator is also generated calling for a stack push operation. During a phase one of a second clock cycle, (a) a stack pointer value stored in a selected stack pointer register is written onto a first bus, the selected stack pointer register being one of either the first stack pointer register or the second stack point register, and (b) the stack pointer value stored in the selected stack pointer register is written into an input latch of a stack pointer adder. During a phase two of the second clock cycle, (a) a stack memory address is formed by using the stack pointer value on the first bus, (b) the stack pointer value stored in the input latch of the stack pointer adder is decremented by a delta amount to form an updated stack pointer value, and (c) the updated stack pointer value is stored in an output latch. During a phase one of a third clock cycle, (a) the updated stack pointer value stored in the output latch is written onto a second bus, and (b) the updated stack pointer value on the second bus is written into a second stack pointer register for storage. During a phase two of a third clock cycle, (a) data is written to memory for storage at a memory location indicated by the stack memory address, and (b) the updated stack pointer value from the second stack pointer register is written into the first stack pointer register for storage. A method for performing consecutive instructions to pop data off a stack in memory in a digital computer is also described. In a digital computer with memory, circuitry for performing a stack operation is also described.
A calculator is defined by a user-interface centered around a last in first out stack of mathematical or logical objects, that is both visible and accessible to a user. Objects may be any of a number of different types, each type characterized by specific logical or mathematical rules. Calculator operations are provided that may be applied in a uniform manner to the objects, affecting either or both the internal composition of the objects or the external positions and number of the objects on the stack. Objects of different types are distinguished upon entry on the stack and in visible display by characteristic prefix and postfix symbols, and can be entered from a keyboard or created dynamically as the result of calculator operations.
A general purpose digital computer whose architecture provides a set of pointer registers at each memory chip to perform stack operations previously performed on the CPU chip. Bidirectional lines interconnect the CPU chip and the memory chips for transmission and reception of data and control signals. Each memory chip has a circuit for incrementing or decrementing the pointer registers in response to a control signal without the transmission of a data signal from the CPU chip to perform a series of stack operations in the memory chip. Addressable registers are provided in each memory chip for identifying the memory chip (PAGE), storing a mode vector (MODE), and counting the number of times the memory controller was addressed (TIME).
The present invention relates to a method within a digital computer system for reading operand data stored in a temporary storage memory in a forward or reverse direction. The method includes loading the temporary storage memory with the first and second operand data strings in a pre-established order such that the subsequent fetching of the operand data words from the temporary storage memory is performed in a sequential order. The loading and fetching steps operate to achieve a desired word order such that the operation between operand data strings can be started while the operand data is being fetched.
The invention provides a computer store having successively addressed storage locations for individual words grouped together to form so-called clotheslines. Data can be written into and read out from either end of a clothesline. A clothesline thus combines the properties of a stack and a silo and can be considered as either a double-ended stack or as a reversible silo.
