A multifrequency generator is provided for a radio transmitter and receiver that must operate on a plurality of channels. The generator includes a channel synthesizer having a phase-locked loop that provides a respective output frequency signal for each selected channel. The generator includes a transmitter synthesizer connected to the channel synthesizer and having a phase-locked loop and a mixer that provide the transmitter synthesizer output signal. The generator includes a receiver synthesizer connected to the channel synthesizer and having a phase-locked loop and a mixer that provide the receiver synthesizer output signal. The frequency of the channel synthesizer output frequency is selected to be substantially lower than the transmitter and receiver synthesizer output frequencies to reduce the noise sideband components of the transmitter and receiver output signals.

A high-accuracy phase comparison system for noise-contaminated fixed-frequency input signals, such as Omega radionavigation signals, employs a pair of phaselock loops in which output pulses from a high-frequency oscillator are deleted at the frequency of a variable-frequency oscillator which is responsive to the detected phase difference between the associated input signal and an associated reference signal, thereby to provide a high-frequency intermediate signal which is frequency-divided to produce the reference signal continuously and free of noise. The relative phase of the input signals may be determined by phase-comparing the reference signals of the two phaselock loops or, to provide even higher precision, by phase-comparing the variable-frequency signals of the two loops.

A frequency synthesiser 50 comprises a VCO 56 whose output signal frequency is proportional to input voltage amplitude. In a first mode, the VCO output is fed via a divider 24 to a phase detector 26 which also receives a reference signal. The phase detector output passes via a loop filter 28 and a controller 70, which is passive in the first mode, back to the VCO 56 to form a closed phase-locked loop. To adjust the frequency synthesiser output frequency, the controller 70 switches the circuit into a second mode in which the VCO 56 output is not fed back, and a constant voltage source is supplied to the VCO 56 instead so that the VCO output frequency is constant. The VCO transfer function is then altered by adjusting a variable capacitor 60 therein, and the circuit is then switched back to the first mode. The locking time of the synthesiser is thereby improved as output frequency changes.

A microwave synthesizer includes a drift-cancel loop having a narrow-band input, a low-frequency comb input, a wide-band input, and an output for providing an adjustable-frequency output signal. A narrow-band synthesizer is coupled to the narrow-band input, and a comb generator is coupled to the low-frequency comb input. Instead of using a wide-band synthesizer to drive the wide-band input, as conventional topologies have done, the instant invention employs a highly stable, low noise high frequency oscillator. The output of the oscillator is mixed with the output of the comb generator to produce low-noise, high frequency combs. The low-noise, high frequency combs are then used to drive the wide-band input of the drift-cancel loop. Significant reductions in phase noise can be achieved as compared with conventional designs.

A method and apparatus for allowing a processor to invalidate an individual line of its internal cache while in a non-clocked low power state. The present invention includes circuitry for placing the processor in a reduced power consumption state. The present invention also includes circuitry for powering up the processor out of the reduced power consumption state to invalidate data in the cache in order to maintain cache coherency while in the reduced power consumption state.