The aim of the present invention is to make it possible to synchronize a digital memory with an existing TV-system, in which a TV-picture is transmitted with video interlace. According to the invention a corrected field synchronizing pulse is formed by means of a composite sync signal of the TV-system, which pulse, in spite of the video interlace, always appears at the starting point of a line and by means of which a part in an address counter for the memory associated with vertical addressing of the memory is reset to a starting position at the starting point of each picture field. The address counter is stepped for addressing purposes by means of a clock signal from a main oscillator, the frequency of which is controlled in response to a comparison between a line synchronizing signal derived from the composite sync signal and line frequency signals supplied from the address counter.

A television receiving program-presetting system comprises means for storing receiving program information in a specified address of a memory; a circuit for defining a vertical address position on a Braun tube screen by counting horizontal synchronizing pulses; a circuit for designating a horizontal address position on the Braun tube screen by counting clock pulses having a higher frequency than the horizontal synchronizing pulses; means for successively producing address information designating the addresses of the memory upon receipt of the outputs from at least the vertical address position defining circuit; means for supplying the address information to the memory and successively reading out the stored program information therefrom; a circuit for generating signals denoting character patterns corresponding to the program information thus read out; means for displaying the character patterns in the form of program information at that address position on the Braun tube screen which is designated by an output signal from the circuit for defining at least a vertical address position on the Braun tube screen; and means for temporarily shutting off the supply of an image signal to the Braun tube while the program information is displayed thereon.

A system for overlaying a computer generated video signal on an NTSC video signal includes horizontal and vertical pulse processor circuits for generating a horizontal start signal and a vertical reset signal, respectively, in accordance with NTSC standards, and a clocking system for receiving the vertical reset signal and the horizontal start signal and for generating control signals to control the read out of video data from the video generator of a computer so that it is read out at an NTSC rate. The system further includes a video insert keyer circuit for combining the NTSC video signal and the computer generated video signal and for generating a composite video signal for transmission to a monitor or standard television.

Broadcast standard format video signals such as that adopted by the National Television Standards Committee (NTSC) or the European standard format of Phase Alternating Line (PAL) and some broadcast "compatible" video signals are used as inputs to a microkeyer to synchronize a microcomputer's display in a manner that allows full and complete merging of the two signals in the broadcast video domain by, for example, additive (mixing) or non-additive (keying) processes. The required synchronization in turn makes possible incorporation in any video space a variety of computer generated visuals such as illustrative graphics, titling and any other data displayed in the video. The merged video signal from this device may then be displayed on a television monitor, or transmitted, or received, or recorded by a video recorder or processed by a standard broadcast means for example. When applied to any common microcomputer display in its most fundamental form, no additional software is required.

A controller for synchronising video signals for displaying on TV screen. The controller has a horizontal input storage for receiving a horizontal synchronising signal of a first sequence for computer generated image data; a vertical input storage for receiving a vertical synchronising signal of a second sequence for computer generated image data; a first processor for generating horizontal synchronising signals of a third sequence and vertical synchronising signals of a fourth sequence; and a second processing for combining the horizontal synchronising signal of the first sequence and the horizontal synchronising signal of the third sequence to generate a horizontal synchronising signal of a fifth sequence and for combining the vertical synchronising signal of the second sequence with the vertical synchronising signal of the fourth sequence to generate a vertical synchronising signal of a sixth sequence; wherein the horizontal synchronising signal of the fifth sequence and the vertical synchronising signal of the sixth sequence generated by the second processor means are arranged to provide timing sequences for image data generated by a computer whereby the image data can be displayed on a TV screen.