A microprogram read only store includes a section for storing substitute microinstruction words which are referenced selectively by microprograms included within the other part of the same store. Each microinstruction word of the store includes a sentinel bit which when set to a predetermined state causes logic circuits to inhibit execution of that microinstruction word and cause the store to address the upper section of the store. During a next cycle of operation, a branch is made to the location specified in the upper section of the read only memory store. Microinstructions in the section are executed until a branch type microinstruction returns the store back to the microprogram under execution.
A main power source voltage is compared with a reference voltage, when the main power voltage drops lower than the reference voltage, an operation/halt signal is formed, a read/write memory write inhibit signal is formed in response to the operation/halt signal, and the read/write memory is inhibited in operation. This write inhibit signal is formed by setting a D-type latch at the timing of the transition of the NIF signal to active mode.
A single-chip microcomputer device contains on-chip program storage in a read-only memory (ROM), and this program may be corrected or updated by patching. The ROM addresses are applied to an off-chip memory device containing one bit for each potential ROM address, and each bit is set to mark the beginning address of code to be patched; an interrupt is signalled when one of these set bits is accessed by an address occurring during operation of the microcomputer. The interrupt causes the processor to branch to an off-chip program memory to insert the patch code. The patch ends in a branch back to the on-chip ROM.
When control of a control program stored in a memory of a microcomputer runs wild and enters an otherwise unused memory location, an instruction written in the otherwise unused location returns the control to its start state.
By storing, along with each signal or bit controlling a step to be taken in a process sequence, an additional signal or bit to be applied to the gating terminal or pin of respective ones of a plurality of "and" gates, to the other input terminal of each of which is supplied its respective input signal from aprocess control element, such as a sensor, switch or valve (each such input signal indicating a changed condition in the process which requires a changed process control sequence) any sequence may be interrupted following any step in that sequence and a new sequence may be called up to make the needed correction or change in the process.
A non-reprogrammable ROM holding microinstruction words cooperates with a Content Addressable Memory made of a TAG Memory and Data Memory. Portions of the locations in the TAG Memory have the same address as certain locations in the ROM so that when these selected addresses occur, a multiplexer will select the updated data from the Data Memory rather that from the ROM. The entire system is placed on one chip and provides great spatial surface savings over that which would be required if only a Static RAM were used for a control storage unit to hold the microinstruction words.
