An improved filter technique, as for example, for use with ladder digital filters which allows any LC-ladder filter to be simply translated into a corresponding digital structure. If one of the characteristics of an adaptor is chosen equal to unity, the output of that adaptor will be independent of the input which means that the direct path between the input and output is interrupted, thus eliminating undesirable closed loops to exist. The invention also provides for isolation between input and output ports in filter elements without the use of delay devices.
A digital signal processing arrangement including a wave digital filter having quantizing means for limiting the signal waves present to a predetermined word length by means of controlled rounding. "Controlled rounding" means that a limit-cycle-free output signal is obtained when a constant input signal is present. If the outgoing signal waves from the N-port adaptor are equal to b.sub.o (j,k), and the signal waves applied to the adaptor are equal to a(j,k), b(j,k) is equal the desired and quantized value of b.sub.o (j,k), where j represents the number of the port, then the process of controlled rounding quantizes b.sub.o (j,k) in such a way that ##EQU1## Here the c(i,j) represent constant coefficients, and r the number of independent information signal waves.
A method and network configuration attain a continuous variation in the transfer function of an adaptive recursive network having multi-port subnetworks associated with parameters of the network, for processing discrete-time signals upon continuous variations in the parameters. The multi-port subnetworks are represented by elementary subnetworks being isolated with respect to the parameters. Each elementary subnetwork has parameters which can assume values in a given total value range being represented by a differently structured elementary subrange network being associated with adjacent value ranges of the respective parameter and having a transfer function varying continuously upon continuous variations in the parameter. A switchable inverter and elementary subnetworks having parameters which can only assume values in a range of the given total value range, are optionally represented by a combined subnetwork. The elementary subnetworks include first and second two-port adaptors each having first and second inputs and first and second outputs. A first adder is connected to the first and second inputs. A second adder is connected to the first input and the second output. A third adder is connected to the second input and the first output. A multiplier is connected between the output side of the first adder and the input sides of the second and third adders. The input side of the first adder of the first two-port adaptor is inverted with respect to the first input, and the input side of the third adder of the second two-port adaptor is inverted with respect to the multiplier.
A balancing network of a wave digital type filter including 3-port pair transforming adaptors (21 to 26) connected in cascade each having a capacitor (C) and a resistor (R) as constituent elements and performing a filter operation function. There is no reflected wave from each port pair other than the two port pairs for the cascade connection of the transforming adaptors (22, 24, 26) each including resistor (R), that port pair is eliminated, and adjoining transforming adaptors (21, 23, 25) each including capacitor (C) are combined to form new 3-port pair combined transforming adaptors (41). Thus, it becomes possible to realize a filter operation by a lesser amount of operations than the sum of the amounts of operations by the 3-port pair transforming adaptors (21 to 26).
The wave digital filter derived from a symmetric lattice reference filter includes two one-port networks each of which consists of storage elements interconnected by arithmetic units. Each arithmetic unit comprises a digital multiplier and three digital adders. Higher order filters thus require a substantial amount of arithmetic hardware. In accordance with the present invention, the amount of arithmetic hardware in the wave digital filter derived from a symmetric lattice filter is substantially reduced by multiplexing an arithmetic unit in each one-port network. In particular, a single arithmetic unit in each one-port is successively configured as each individual arithmetic unit of the non-multiplexed one-port. Intermediate output signals are stored in temporarily vacant storage elements. In one described embodiment of the present invention, the two multiplexed one-port networks of the wave digital filter are further multiplexed to require only one arithmetic unit.
A method for digital frequency conversion of audio signals or PCM signals into signals of a frequency-division multiplex system in which the original signals exist in a channel of limited band width. All channels are brought into their desired frequency ranges through simplified multiplication processes, using a basic operating rate having a frequency of six times the channel band width.
