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Claims  |
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We claim:
1. In a multiplexed data transmission system for transmitting data over a
transmission line from a first location to a second location, sender means
at said first location including first means for generating a serial pulse
train including a start pulse followed by a plurality of data pulses
during each of a plurality of time frames, second means for transmitting
pulse trains provided by said first means to said second location over
said transmission line, and inhibit means for inhibiting the transmission
of pulse trains during alternate time frames, and receiver means at said
second location including means for receiving said pulse train, data
storage means, and sequencing means including clock pulse generating means
responsive to the start pulse to provide a plurality of clock pulses
having a predetermined relation to said start pulse for enabling said data
pulses to be gated into said data storage means.
2. A data transmission system as set forth in claim 1 including means for
monitoring the condition of said transmission line and for providing a
first indication in the event of an open-circuit condition for said
transmission line and a second indication in the event of a short-circuit
condition for said transmission line.
3. A data transmission system as set forth in claim 2 wherein said receiver
means includes transmission line monitoring means having counter means for
counting the clock pulses provided by said clock pulse generating means
and alarm indicating means controlled by said counter means to provide an
alarm indication whenever said start pulse fails to be received by said
receiver means during a time frame in which said sender means is
transmitting.
4. A data transmission system as set forth in claim 3 wherein said
transmission line monitoring means includes first gating means enabled by
outputs of said counter means whenever a start pulse appears within a
preselected time of each time frame that said sender means is transmitting
to effect reset of said secondary counter means.
5. A data transmission system as set forth in claim 3 wherein said
transmission line monitoring means includes second gating means enabled by
outputs of said counter means to provide an output whenever said start
pulse fails to appear within a predetermined time of each time frame for
which said sender means is transmitting, and wherein said alarm indicating
means includes third gating means and enabling means, said third gating
means having a first input connected to receive said clock pulses a second
input connected to the output of said enabling means and an output
connected to said alarm indicating means, said enabling means being
responsive to the output provided by said second gating means to enable
said third gating means to follow said clock pulses to thereby energize
said alarm indicating means.
6. A data transmission system as set forth in claim 3 including fourth
gating means having a first input connected to receive the serial pulse
train transmitted over said transmission line and a second input connected
to the output of said enabling means, said third gating means being
enabled by said enabling means to drive said alarm indicating means at a
first rate in the event of an open circuit condition for said transmission
line, and said fourth gating means being enabled to maintain said alarm
indicating means continuously energized in the event of a short circuit
condition for said transmission line.
7. A data transmission system as set forth in claim 3 wherein said alarm
indicating means includes first and second indicator means, said first and
second indicator means being normally driven synchronously whenever said
clock pulse generating means is providing clock pulses at a rate
substantially the same as the rate of data transmission by said sender,
said first and second indicator means being driven asynchronously whenever
the clock pulse generating rate deviates from said pulse transmission
rate.
8. A data transmission system as set forth in claim 7 wherein said clock
pulse generating means includes means for adjusting the rate of generation
of clock pulses to enable synchronization of said receiver means with said
sender means.
9. In a multiplexed data transmission system for transmitting data over a
transmission line from a first location to a second location, sender means
at said first location including means for generating a serial pulse train
including a start pulse followed by a plurality of data pulses during each
of a plurality of time frames, and means for transmitting the pulse trains
provided during at least certain ones of said time frames to said second
location over said transmission line, and receiver means at said second
location including means for receiving said pulse train, data storage
means including serial-to-parallel converter means and pulse storage means
providing a separate storage location for each of the data pulses of a
given frame, and sequencing means including clock pulse generating means
responsive to the leading edge of the start pulse to provide a plurality
of clock pulses having a predetermined relation to said start pulse, and
means responsive to said clock pulses to provide shift pulses for enabling
said data pulses to be shifted into said converter means, and means
enabled after all of the data pulses of a given frame have been shifted
into said converter means to provide a transfer pulse for enabling said
data pulses to be transferred to said pulse storage means.
10. A data transmission system as set forth in claim 5 wherein said sender
means is operated to transmit data pulses at a predetermined rate and
wherein said clock pulse generating means is operable to provide clock
pulses at a rate that is approximately twice said predetermined rate,
whereby a first clock pulse is provided at the leading edge of each data
pulse, and a second clock pulse is provided at the midpoint of each data
pulse said data pulses being gated into said converter means by said
second clock pulse.
11. A data transmission system as set forth in claim 7 wherein said
receiver means includes means driven by said clock pulses and said data
pulses for providing an indication whenever the clock pulse rate deviates
from a desired rate.
12. A data transmission system as set forth in claim 11 wherein said clock
pulse generating means includes means for adjusting the clock pulse
generation rate to enable synchronization of the clock pulses with the
data pulses.
13. In a multiplexed data transmission system for permitting the
transmission of data over a transmission line from a monitoring location
to a location remote from the monitoring location, sender means at said
monitoring location including means for generating a serial pulse train
including a start pulse and a plurality of data pulses each of which
represents a normal or off-normal condition for a different one of a
plurality of monitoring points, and means for transmitting said pulse
train to said monitoring location over said transmission line, receiver
means at said monitoring location including input means for receiving said
serial pulse train, serial-to-parallel converter means, clock pulse
generating means responsive to said start pulse for generating a plurality
of clock pulses having a predetermined relation to said start pulse for
synchronizing the operation of said receiver means, sequencing means
responsive to said clock pulses to provide shift pulses for gating said
data pulses into said converter means, and data storage means, said
sequencing means including means responsive to a predetermined number of
said clock pulses indicating that all of the data pulses of a given pulse
train have been gated into the converter means to effect the transfer of
said data pulses from said converter means to said data storage means.
14. A data transmission system as set forth in claim 11 wherein said data
storage means comprises a plurality of temporary data storage circuits
including a separate data storage circuit corresponding to each monitoring
point to receive the data pulse representing the condition for such
monitoring point, each data storage circuit storing a first data bit to
indicate a normal condition for the monitoring point and a second data bit
to indicate an off-normal condition for the monitoring point, each of said
data storage circuits being operable to provide an output whenever the
data bit stored therein changes from said second bit to said first bit,
and alarm means operable in response to an output provided by one of said
data storage circuits to provide an alarm indicating a return to a normal
condition for the corresponding monitoring point.
15. A data transmission system as set forth in claim 14 wherein said data
storage means further includes a plurality of permanent data storage
circuits having a further data storage circuit corresponding to each
monitoring point, each of said further data storage circuits being
controlled by an associated data storage circuit of said temporary data
storage circuits to store a data bit representing an off-normal condition
for a corresponding monitoring point, each of said further data storage
means having an associated alarm indicator means operable to provide an
indication whenever a corresponding monitoring point is in an off-normal
condition.
16. A data transmission system as set forth in claim 15 which includes
means for enabling said alarm means whenever a data bit representing an
off-normal condition for a monitoring point is stored in a data storage
circuit of one or more of said permanent data storage circuits.
17. In a multiplexed data transmission system for transmitting data
representing the conditions of a plurality of monitoring points over a
transmission line from a monitoring location to a location remote from the
monitoring location, sender means at said monitoring location including
point sensing means for providing a plurality of outputs each representing
a noraml or off-normal condition for a different one of the monitoring
points, sequencing means for effecting sequential readout of the outputs
of the point sensing means to provide a serial pulse train including a
start pulse followed by a plurality of data pulses each of which is coded
to represent the condition of a different one of said monitoring points,
and switching means controlled by said pulse train to enable the
transmission of said start pulse and said data pulses over said
transmission line to said remote location, and receiver means at said
remote location including pulse detecting means for receiving said serial
pulse train, data storage means, and clock pulse generating means
responsive to said start pulse for generating a plurality of clock pulses
having a predetermined relation to said start pulse for effecting the
gating of said data pulses into said storage means.
18. A data transmission system as set forth in claim 17 wherein said point
sensing means includes a plurality of condition indicating means each
individually associated with a different one of said monitoring points and
operable to provide a first output whenever the associated monitoring
point is indicating a normal condition and a second output whenever the
associated monitoring point is indicating an off-normal condition, said
sequencing means including enabling means and gating means for enabling
the outputs provided by said condition indicating means to be scanned in
sequence, said gating means having a plurality of inputs each connected to
an output of a different one of said condition indicating means whereby,
as the outputs of said condition indicating means are sequentially
scanned, said gating means is enabled to provide a control output for each
condition indicating means providing said second output, said switching
means including keyed relay means connected to the output of said gating
means, said relay means having normally open contacts connected in series
with said transmission line for normally providing a space pulse for
transmission to said receiver means, said relay means being energized
responsive to each control signal provided by said gating means to operate
said contacts thereby providing a mark pulse for transmission to said
receiver means.
19. A data transmission system as set forth in claim 18 wherein each said
condition indicating means comprises a relay having a contact individually
connected between different output of said decoder means and an input of
said gating means, said contact being normally open to prevent an enabling
signal provided by said decoder means from being extended to said gating
means whenever the associated monitoring point is indicating a normal
condition and said contact being closed to permit said enabling signal to
be extended to said gating means whenever the associated monitoring point
is indicating an off-normal condition.
20. A data transmission system as set forth in claim 18 wherein said gating
means has a further input connected to an output of said enabling means to
permit said gating means to provide said control signal prior to the
scanning of said outputs of said condition indicating means whereby said
relay means is energized to provide a mark pulse for representing said
start pulse.
21. A data transmission system as set forth in claim 18 wherein said
enabling means includes clock pulse generating means, counter means
responsive to successive clock pulses provided by said clock pulse
generating means to provide a plurality of sets of binary coded signals at
outputs thereof during each of a plurality of successive time frames, and
decoder means for decoding each set of binary coded signals provided by
said counter means to thereby provide a sequence of enabling signals at
outputs thereof to permit the generation of said start pulse and the
sequential scanning of said outputs of said condition indicating means.
22. A data transmission system as set forth in claim 18 including inhibit
means having an enabling input connected to an output of said decoder
means and a control output connected to an output of said gating means,
said inhibit means being enabled by an output of said decoder means after
the outputs of all of said condition indicating means have been scanned to
enable said inhibit means to inhibit said gating means to prevent data
transmission during alternate time frames.
23. A data transmission system as set forth in claim 22 wherein said
inhibit means includes a flip flop and indicating means controlled by an
output of said flip flop to be energized whenever the flip flop is set and
deenergized whenever the flip flop is reset.
24. In a multiplexed data transmission system for transmitting data over a
transmission line between first and second locations interconnected by
said transmission line, sender means at said first location for generating
a serial pulse train including a start pulse followed by a plurality of
data pulses coded to represent the data to be transmitted, for
transmission to said second location over said transmission line, receiver
means at said second location including clock pulse generating means, and
start pulse sensing means responsive to the start pulse of said pulse
train to enable said clock pulse generating means to provide a plurality
of clock pulses at a rate approximately twice the rate of said data pulses
whereby a first clock pulse is provided at the leading edge of each data
pulse and a second clock pulse is provided at the midpoint of each data
pulse, shift register means and counter means for counting said clock
pulses and for providing shift pulses to said shift register means for
enabling each of the data pulses to be gated into said shift register
means at the mid point of the data pulse, and a plurality of data storage
means having a separate data storage location for each data pulse of said
pulse train, said counter means being operable to provide a transfer pulse
after all of said data pulses have been gated into said shift register
means to effect the transfer of said data pulses from said shift register
means to said data storage means. |
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Claims |
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Description |
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BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to data transmission systems, and more particularly
to a digital multiplexing system including a sender for transmitting data
pulses to a receiver over a transmission line wherein the data pulses
effect synchronization of the receiver with the sender.
2. Description of the Prior Art
Various types of multiplexed data transmission systems have been disclosed
in the prior art for transmitting data via a sender from a plurality of
locations to a remotely located receiver. In certain systems, special
transmission lines are required to permit data transmission between the
locations of the sender and the receiver, thus adding to the cost of the
system.
In addition, to permit accurate recovery of the data transmitted from the
sending location to the receiving location, it is necessary that the
receiver be synchronized with the sender. Generally, the sender and
receiver each include precision clock circuits, including crystal
oscillators, for example. However, the frequency output of the receiver
must be set to correspond with that of the sender to permit the receiver
to operate in synchronism with the sender. The initial adjustment of the
receiver clock during installation may require the use of various
measuring instruments which may be undesirable particularly when the
receivers are installed at remote locations. In addition, since the sender
and receiver clocks operate independently of one another, some provision
must be made to compensate for drift of receiver oscillator as may occur
due to ambient temperature change or component ageing.
It would be desirable therefore to have an inexpensive multiplexed data
transmission system which is capable of monitoring a plurality of points
over an extremely long distance over existing communication lines, such as
telephone grade lines, for example. It would also be desirable to have a
multiplexed data transmission system in which the receiver automatically
synchronizes itself with the sender, thereby requiring no special internal
clock and eliminating the need for instrumentation to synchronize receiver
and sender operations.
SUMMARY OF THE INVENTION
Therefore, it is an object of the invention to provide an inexpensive
multiplexed data transmission system including a sender for monitoring a
plurality of monitoring points and for transmitting data representing the
conditions of the monitoring points to a receiver over regular grade
telephone lines which require no special balancing or correction.
It is another object of the invention to provide a data transmission system
wherein conditions indicated at a plurality of monitoring points are
transmitted to a receiver which accepts and displays the information
representing the conditions of the monitoring points being monitored.
It is a further object of the invention to provide a multiplexed data
transmission system wherein receiver operation is automatically
synchronized with the sender.
Another object of the invention is to provide a receiver for use in such
system which can be tuned without instrumentation to be operable in
synchronization with a corresponding sender.
It is yet another object of the invention to provide a start-stop
multiplexed data transmission system wherein information provided at a
plurality of monitoring points may be transmitted over a communication
line from a sending location to a receiving location remote from the
sending location during a first group of timing intervals and wherein
information may be transmitted over the communication line from the
receiving location to the sending location during a second group of timing
intervals.
Another object of the invention is to provide a digital multiplexing system
for transmission over voice grade telephone lines which provides inherent
security of the line and which indicates open or short circuit conditions
of the line.
These and other objects of the invention are achieved by the present
invention which provides a multiplexed data transmission system including
sender means having monitoring point sensing means operable to provide
outputs indicative of normal or off-normal conditions of a plurality of
monitoring points, sequencing means controlled by clock pulse generating
means for sequentially scanning the outputs provided by the point sensing
means to produce a serial data pulse train including a start pulse and
pulses representing the information provided at the monitoring points, and
switching means responsive to the data pulse train to effect transmission
of the data to a receiver means over a transmission line.
The receiver means comprises a clock pulse generating means, including a
synchronized or force-fired clock which is responsive to the start pulse
of the data pulse train to effect the generation of receiver clock pulses
for gating the serial data pulses into a serial-to-parallel converter
means. The clock pulse generating means is also operable to count the data
pulses and provide a transfer pulse for effecting parallel transfer of the
data pulses shifted into the serial-to-parallel converter means into data
storage means when all of the data pulses have been received.
The data storage means may include temporary storage means responsive to
the storage of the data pulses to provide an indication that one or more
of the monitoring points has returned to a normal condition. The data
storage means may also include permanent storage means responsive to the
storage of the data pulses to provide an alarm indication whenever one or
more of the monitoring points is off-normal and to permit indentification
of each monitoring point providing an off-normal indication.
The receiver means further includes means for monitoring the condition of
the transmission line, and providing a first indication as the result of
an open-circuit condition for the line, and a second indication in the
case of a short-circuit condition for the line.
In addition, in accordance with the feature of the invention the receiver
means includes visual indicating means for indicating that the clock pulse
generating means of the receiver means is not in synchronism with the
sender clock pulse generating means and means for adjusting the rate of
the receiver clock pulse generating means to achieve synchronism with the
sender clock pulse generating means. Moreover, such adjustment of the rate
receiver clock pulse generating means to the speed of the sender clock
pulse generating means can be made without the use of test instruments.
The multiplexed data transmission system of the present invention may
provide bidirectional transmission of information over a common
transmission line. The sender means includes an inhibit means operable to
inhibit transmission of information from the sender to the receiver means
during alternate frames, normally preventing data transmission during
alternate scan frames to provide time for enabling the receiver means to
synchronize itself with the sender means.
In accordance with the invention, a further or secondary sender means may
be employed at the location of the receiver means and enabled to transmit
information from the location of the receiver means to the location of the
other, or primary, sender means during a portion of the time frames for
which the primary sender is inhibited. Secondary receiver means at the
location of the primary sender means is enabled to receiver the
information provided by the secondary sender. The secondary send/receive
apparatus operates in a manner similar to the primary send/receive
apparatus with synchronization of the secondary receiver with the
secondary sender being affected through the use of a synchronized or
force-fired clock in the secondary receiver which is responsive to a start
pulse provided by the secondary sender. The secondary receiver means is
enabled to receive information only when the secondary sender means is
transmitting. During the time the primary sender means is transmitting,
the secondary receiver means is inhibited by the inhibit means of the
primary sender means. In addition, whenever the secondary sender means is
transmitting, the primary receiver means is inhibited.
Thus, in the multiplexed data transmission system of the present invention
wherein the primary send-receiver apparatus is operable as a start-stop
data transmission system for sending information over a transmission line
from a first location to a second location, the provision of a secondary
sender means and a secondary receiver means enables information to be
transmitted over the same transmission line from the second location to
the first location during a portion of the time slot which defines the
stop pulse for the primary send-receive system.
DESCRIPTION OF THE DRAWINGS
FIG. 1 is a block diagram of an embodiment for a sender for use in the
multiplexed data transmission system provided by the present invention;
FIG. 2 is a block diagram of an embodiment for a receiver for use in the
multiplexed data transmission system provided by the present invention;
FIG. 3 is a schematic and partial block diagram of the sender shown in
block form in FIG. 1;
FIGS. 4A-4E illustrate waveforms of signals for circuits of the sender
shown in FIG. 3;
FIGS. 5-7, when arranged as shown in FIG. 12, provide a schematic circuit
and partial block diagram of the receiver shown in block form in FIG. 2;
FIGS. 8A-8F illustrate waveforms of signals for use in the generation of
shift pulses for the receiver shown in FIGS. 5-7;
FIG. 9 is a schematic circuit and partial block diagram of a secondary
sender for the multiplexed data transmission system of the present
invention for use in conjunction with the receiver shown in FIGS. 5-7;
FIG. 10 is a schematic circuit and partial block diagram of a secondary
receiver for the multiplexed data transmission system of the present
invention for use in conjunction with the sender shown in FIG. 3;
FIG. 11 illustrates waveforms of signals for the secondary receiver shown
in FIG. 10,
FIG. 12 shows how FIGS. 5-7 and 9 are to be arranged; and,
FIG. 13 shows how FIGS. 3 and 10 are to be arranged.
DESCRIPTION OF PREFERRED EMBODIMENTS
General Description
The present invention provides a digital multiplexing system for
transmitting information from a plurality of test points to a receiver at
a location remote from the location of the test points. The monitoring or
test points may, for example, be connected to apparatus associated with a
plurality of roof top air conditioning units to permit the registration of
fault indications at a location remote from the location of the air
conditioning units.
The multiplexing system of the present invention includes a sender 20,
shown in block diagram form in FIG. 1, and a receiver 40, shown in block
diagram form in FIG. 2.
With reference to FIG. 1, the conditions at a plurality of test points,
indicated generally at 21, are monitored by a point sensing circuit 22
which provides a plurality of output signals at points 22a, 22b, 22c, 22d,
for example, each of which is indicative of the condition of a different
one of the test points 21. The point sensing circuit 22 also serves as an
interface circuit to provide isolation between the test points 21 and the
electronic circuits of the sender 20.
The outputs of the point sensing circuit 22, such as outputs 23a-23d shown
in FIG. 1, are sequentially scanned by the sequencing circuit 24 under the
control of a clock 27, to permit the signals to extend to inputs of an
output gate circuit 23 and thence to a key switch circuit 25 in serial
fashion. The key switch circuit 25 responsively effects the generation of
output pulses over a data line 26 which is connected to the receiver 40
(FIG. 2).
The sequencing circuit 24 counts out a block of clock pulses defining a
frame to provide a plurality of time slots for each scanning cycle,
including a separate time slot for each of the test points and an
additional time slot to permit the transmission of a start pulse used to
enable synchronization of the receiver 40 with the sender 20.
An inhibit circuit 28 driven by the sequencing circuit 24, inhibits the
gate circuit 23 during alternate frames preventing data transmission for
alternate scanning cycles to provide time for enabling the receiver 40 to
synchronize itself with the sender and latch onto the proper signal.
The serial data provided at the output of the gate circuit 23 includes a
start pulse followed by a plurality of sequential data bits which
correspond in number to the number of test points 21. Each data bit
represents the condition of a different one of the test points 21 and by
way of example, a logic 0 level bit may be used to indicate a normal
condition and a logic 1 level bit may be used to indicate an off-normal or
alarm condition. The sequence of logic level bits, including the start
pulse and the logic 1 of logic 0 data bits which represent the conditions
of the test points 21, are transmitted to the receiver over the data line
26.
Referring to FIG. 2, there is shown a block diagram of the receiver 40. The
receiver 40 is connected to the transmission line 26 to receive the serial
data transmitted by the sender 20 and to convert the serial data to
parallel form to permit the display of information represented by the
coded data bits in appropriate display circuits.
The receiver 40 includes an interface circuit 41 which may, for example, be
a photocoupler circuit, which provides DC isolation between the
transmission line 26 and logic circuits of the receiver 40.
The serial data transmitted over transmission line 26 is received by the
photocoupler circuit 41 and passed to a serial-to-parallel converter 43.
The serial data is clocked into the serial-to-parallel converter 43 by
shift pulses provided by a primary counter circuit 44. The primary counter
circuit 44 is in turn driven by a synchronized or force-fired clock 45.
The synchronized clock 45 is operable when enabled to effect the generation
of clock pulses, which are extended over gate 47 to the receiver circuits
including the primary counter 44, to synchronize the operation of the
receiver circuits. The clock 45 is synchronized and the gate 47 is enabled
by a start pulse sensor circuit 46 which is connected to the output of the
photocoupler circuit 41 and is responsive to each start pulse, which
appears as the first pulse on each data pulse train transmitted by the
sender 20, to provide outputs for snychronizing the clock 45 and enabling
the gate 47. The provision of a start pulse generated by the sender 20
synchronizes the clock 45 with the sender circuit 20.
The primary counter 44 also counts the received data pulses and provides a
data transfer pulse at the end of each frame to effect the transfer of the
information shifted into the serial-to-parallel converter 43 into a
plurality of temporary storage circuits 48. The temporary storage circuits
48 may comprise a plurality of latch circuits including a separate latch
circuit for each data bit being transmitted.
The function of the temporary storage circuits 48 is to effect the
provision of return-to-normal indications for one or more of the test
points 21. The temporary storage circuits 48 control a back-to-normal
indicator 53 over an associated driver circuit 54 to provide an indication
that one or more of the test points 21 which was previously indicating an
off-normal condition has returned to a normal condition as indicated by a
change in the corresponding bit of the data pulse train from a logic 1
level to a logic 0 level.
The temporary storage circuits 48 further control an audible alarm device
51 which is energized over an associated driver circuit 52 by the
temporary storage circuits 48 to provide an audible alarm to indicate a
return-to-normal condition for one of the test points 21.
The receiver 40 may also include a permanent storage circuit 58 including a
plurality of latch circuits corresponding in number to the number of data
bits being transmitted by the sender 20. The data bits are gated into the
latch circuits of the permanent storage circuits 58 at the end of each
frame under the control of the primary counter 44.
The function of the permanent latch circuits 58 is to provide outputs
indicating off-normal or alarm conditions for one or more of the test
points as represented by the data bits gated into the permanent storage
circuits 58, and to indentify the source of each off-normal condition. The
permanent storage circuits 58 control the audible alarm device 51 to
provide an audible alarm whenever one of the test points 21 goes
off-normal. The permanent storage circuits 58 also control individual
alarm indicators 59, over associated driver circuits 60 to indicate which
of the test points 21 is at an off-normal condition. The individual alarm
indicators 59 include a separate indicating device for each of the test
points 21.
When all of the test points 21 are indicating a normal condition, the data
bits transferred to the temporary and permanent storage circuits 48 and
58, respectively, will be ineffective to cause an alarm indication.
On the other hand, if one or more of the test points 21 is indicating an
off-normal or alarm condition, the permanent storage circuits 58 will
effect enabling of the audible alarm device 51 as well as an alarm
indicating device of the alarm indicators 59 to indicate the source of
such off-normal condition.
The receiver 40 includes a reset circuit 62 which is manually operable to
provide reset of the permanent storage circuits 58 to deactivate the
audible alarm device 51 and the individual alarm indicators 59.
In addition to the capability of providing indications of the conditions
for a plurality of test points 21 the receiver 40 also monitors the
condition of the transmission line 26 and detects and displays alarms
indicative of open or short circuit conditions for the line 26 as may
occur as the result of tampering or malfunction in the transmission line
26. The receiver 40 also recognizes restoration of a broken or shorted
transmission line and provides an indication of a return-to-normal
condition for the transmission line 26.
To this end, the receiver 40 includes a secondary or slave counter 63 and
an associated guard circuit 64. The secondary counter 63 is driven by the
force-fired clock 45 in parallel with the primary counter 44. The
secondary counter 63 follows the start pulse and makes sure that the start
pulse is always present and that such pulse appears at the proper time
slot.
The guard circuit 64 is enabled if the start pulse does not appear within
the preselected time, as for example as the result of an open circuit
condition for the line, the guard circuit 64 sets a master alarm flip flop
65 which in turn enables a master alarm indicator 66 to provide a visual
alarm. The master alarm flip flop 65 also energizes the audible device
driver 51 over the associated driver circuit 52 to provide an audible
alarm.
In the case of a short circuit condition for the transmission line 26, the
start pulse will not be received, and accordingly the secondary counter 63
will enable the guard circuit 64 to set the master alarm flip flop 65
thereby energizing the master alarm indicator 66 and the audible device
driver 52.
The master alarm indicator 66 provides a first indication in the event of
an open circuit condition for the transmission line and a second
indication whenever the transmission line is shorted.
Detailed Description
Referring to FIG. 3, there is shown a schematic and partial block diagram
of the sender 20. The remote test or monitoring points 21 are connectable
to the sender 20 over a terminal strip 81 which provides a pair of
terminals, such as terminals 1 and 1c for each test point being monitored.
In an exemplary illustration wherein seven remote test points are to be
monitored, seven pairs of terminals 1, 1c; 2, 2c; etc, are provided.
A first terminal of each pair, such as the terminals 1-7 are individually
connected to a supply voltage +V1, which may be 15VDC, over coils of a
plurality of relays K1-K7, which comprise the point sensing circuit 22. A
second terminal of each pair, including terminals 1c-7c, are connected to
ground.
Relays K1-K7, which are normally deenergized, have normally open contacts
K1a-K7a, respectively. In the event of an alarm condition at one or more
of the test points, the corresponding interface relay K1-K7 is energized
to close the associated contacts K1a-K7a.
The contacts Kla-K7a of the interface relays K1-K7 are serially connected
between outputs of a decoder circuit 82 and a summing gate 23. Decoder
circuit 82 together with a counter 83 comprise the sequencing circuit 24.
The decoder circuit 82 may, for example, be the type 9301, commercially
available from Fairchild Semiconductor and the counter 83 may be the type
N8281 4-bit counter which is commercially available from National
Semiconductor. The summing gate 23 may be a multiple input OR gate having
inverting inputs, such as the type 1802, commercially available from
Motorola.
The four-bit counter 83 is driven by clock 27 which provides a time base
for both the sender 20 and the receiver 40 of the multiplexing system as
will be shown in more detail hereinafter. The clock circuit 27 is
comprised of a pair of switching transistors Q1 and Q2 and associated bias
elements including resistors R1-R4 capacitor C1 and diode D1. Power is
supplied to the clock circuit 27 from voltage source +V1 over a voltage
regulator circuit 84 which includes a transistor Q3, a resistor R5 and a
Zener diode Z1.
The clock circuit 27 is operable as a free running oscillator providing
output pulses at a 15Hz rate as transistors Q1 and Q2 are alternately
rendered conductive and non-conductive. The frequency of oscillation of
the clock 27 is determined by the values of capacitor C1 and resistors R1
and R2.
The output of the clock 27 is counted by the counter 83 which supplies
binary coded decimal inputs to the decoder circuit 82. For each group of
ten pulses counted by the counter 83 and supplied to the decoder 82 in BCD
code, the decoder 82 responsively provided logic 0 level signals at
outputs 91 -99 in succession.
A first output 91 of the decoder 82 is extended directly to a first
inverting input of the multiple input OR gate 23. Outputs 92-98 of the
decoder 82 are extended over normally open contacts K1a-K7a of relays
K1-K7, respectively, to further inverting inputs of the gate 23.
Output 99 of the decoder circuit 82 is extended to a clock input of a JK
flip flop 86, which comprises the inhibit circuit 28, and also to a reset
input of the counter 83. The flip flop 86 may, for example, be of the DTL
family such as the type 9093commercially available from ITT. The output Q
of the JK flip flop 86 is extended to the output of the multiple input
gate 23 at point 101 and effectively inhibits gate 23 whenever the flip
flop 86 is set by maintaining point 101 at ground potential.
The output of the summing gate 23 is connected to an input of the key
switch device 25, which may, for example, be a solid state relay such as
the type MD100-1A commercially available from Multiplex Communications.
The solid state relay 25 has a negative input 102 connected to point 101 at
the output of summing gate 23 and a positive input 103 connected to a
source of regulated DC voltage +V2, which may be 5VDC. The solid state
relay 25 has outputs 106 and 105 connected to terminals T and R,
respectively of the terminal strip 81 and normally provides an open
circuit across terminals R and T when the relay is unenergized.
Terminals T and R are connectable to the transmission line 26 which may,
for example, comprise a standard two wire telephone line. It is pointed
out that a regular grade telephone line may be employed to permit
transmission of the data between the locations of the sender 20 and the
receiver 40 and the telephone line need not be balanced or corrected.
The solid state relay 25 is controlled by the voltage level at point 101
and thus is influenced by the state of the flip flop 86. Whenever the flip
flop 86 is set, the solid state relay follows the output of the summing
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