A digital system for Bit Error Rate Testing (BERT) of test transmission lines and/or devices and including a test equipment coupled to at least one transmission line for transferring digital information between the test equipment and a company office, a bit error generator coupled to the transmission lines for generating test patterns, a device for storing a plurality of predetermined profiles, each profile having associated therewith at least one parameter for measuring the integrity of the test equipment or the transmission lines, the parameters including one of the generated test patterns. The predetermined profiles are automatically sent through the test equipment and the transmission lines in a predetermined order thereby avoiding user interaction, the test equipment receives information responsive to the profiles sent through the transmission line, wherein the received information is verified against the information included in the profiles for determining the integrity of the test equipment or the transmission lines.

An apparatus for measuring phase and amplitude jitter and simultaneously and audibly counting and monitoring transient excursions of two linear bar-chart type readouts calibrated in degrees and modulation percents and which are capable of displaying jitter measurements. The transient excursions in the form of phase hits, gain hits, drop outs and impulse noise are simultaneously counted in parallel registers and means are provided for visually indicating the cumulative real time count total of each register in numerical display. The method of evaluating parameters affecting voiceband data transmission includes simultaneously displaying phase and amplitude jitter components onto linear bar-chart displays and separately deriving the information for each of said displays and providing continuous and sequential illumination on each display encompassing the range of fluctuations from the jitter detectors.

A circuit for simulating the transmission characteristics of lines carrying digital signals, such as bus lines in ISDN networks. A partial line simulating device is assembled as a standard circuit including three different circuit parts in such a manner that any line design of any line length can be simulated.

Test pulses representing bits combined in bursts are generated, defined in form and amplitude, and jittered, defined by reading curve shaped characteristic data and jitter identification data from digital memories, for the purpose of simulating defined cable types and lengths and are transmitted to a unit to be tested. In a receiver, the test pulse is received and forwarded by the unit under test are accepted for the purpose of a test and are compared to the test pulses transmitted by the transmitter.

A token ring local area network (LAN) testing apparatus is provided. The apparatus is able to conduct a phase jitter measurement without disruption of normal token ring operation. The apparatus transmits a frame that includes phase jitter test data. This frame is transmitted into the token ring, together with a clock signal. After return of the frame with the phase jitter test data, a comparison is made between the recovered clock signal accompanying this frame and a reference clock signal. The result of this comparison provides a sample used in determining phase jitter. In making the measurement, an interpolation circuit is utilized to increase the resolution of the time difference between the recovered clock signal and the reference clock signal. A clamp circuit is used to ensure that each interpolation begins at the same reference voltage, as well as ensuring that the interpolation process is properly discontinued.