A system is disclosed for determining and recording a plurality of individual rates of occurrence of predetermined events over a time span wherein the system utilizes a sensor-accumulator which senses the occurrence of a plurality of events over a predetermined time and translates the accumulated total into a binary expression. The binary expressions are periodically written into a dynamic recirculated memory in a serial fashion and after a predetermined time are all read out to a printing device. The position of the last entered binary expression in the recirculating memory is indexed by means of a counter which is reset to zero upon entry of a word and initiates counting upon the entry of the last bit of the word. A decoder is set to generate a signal each time the counter reaches a count equal to the memory capacity to thus index each complete recirculation of the memory past the point of the last bit entered. Readout of the memory is controlled by initiating a count upon the appearance of the index signal equal to the difference between the memory capacity and the number of bits entered into memory to thus establish the first entered bit in the serial train whereupon the content of the memory is serially read out.
An apparatus for receiving, storing and outputting digital signal sequences wherein both the length of the sequences and the individual digital signals themselves may be adjusted without extensive hardware requirements, the apparatus having a content addressable capability. The apparatus includes a serial first-in first-out memory a control circuit including a digital clock and a plurality of control signals for erasing, modifying, and addressing the digital signals.
Performance monitor apparatus is adapted to monitor various computer program events such as the length of time required to execute a particular program, the number of times a particular program or instruction sequence is executed during some predetermined period, etc. The apparatus includes a buffer for receiving an instruction data word from a data processor and for temporarily storing the data word, a register having a plurality of bistable elements each of which is adapted to produce either a first or second output signal in response to receipt of a first or second operation signal respectively and receipt of a select signal, a select logic circuit for applying a select signal to a particular bistable element identified by certain bits of the instruction data word stored in the buffer, and an operation logic circuit for supplying to the bistable elements either a first or second operation signal as determined by certain other bits of the instruction data word stored in the buffer. Each bistable element represents a different event or occurrence in a computer program being monitored and the signals produced by the bistable elements indicate the nature of the monitoring operation to be performed. The signals are supplied to timing and counting apparatus which then either measures the time over which the signals are produced or increments a count in response to receiving the signals.
Method and apparatus for interconnecting parallel command data in a controller and parallel status data in a controlled device by transmitting the command and status data between the controller and controlled device through serial data links. The serial data links to and from the controller pass through electromagnetic radiation filters to prevent any radiation from leaving the controller through the interconnecting command and status data lines.
Equipment with a printer, such as a desk top calculator with a printer, is provided with a special key for instructing printing of a graphic pattern. By depressing the special key, input numeric data and/or an operation result are printed in a graph such as a bar graph which represents the magnitude of the data.
A controller programmer connects to a programmable controller and serves as a means for loading and editing the control program. When the contact histogram mode of operation is employed the logic state of a selected I/O device connected to the controller is monitored, and each time its status changes, its present status is recorded along with the time interval between status changes. A first embodiment is described in which the invention is employed in a hardwired controller program loader and a second embodiment is described in which the controller program loader employs a programmed microprocessor. In the first embodiment the status changes are recorded on paper tape and in the second embodiment they are recorded on a cathode ray tube screen.
