A CMOS output circuit including CMOS inverters, is formed on a semiconductor substrate and N MOS switching transistors are provided. The output circuit is responsive to an external control signal for switching a plurality of reference voltages and delivering them as multiple-level drive signals. The CMOS output circuit furthermore includes PMOS switching circuits connected in parallel with each of a plurality of CMOS transfer gates, CMOS inverters, and N MOS switching transistors for preventing a latch-up phenomenon of the CMOS inverters from being produced. The PMOS switching circuits are on-off controlled by a control signal obtained by converting an amplitude level of an external control signal.

The present invention relates to an improvement in an EL driver including a second power supply voltage producer for producing second supply voltage for use in driving an EL lamp using a battery serving as a first power source, a third supply voltage producer for producing third supply voltage that is higher than the first supply voltage and lower than the second supply voltage, and a driving signal supplier for supplying an AC driving signal to an EL driving means when driven by the third supply voltage. The level of the AC driving signal is increased in two steps. The EL driver semiconductor device characteristic of the high-voltage efficiency and high threshold voltage can therefore be driven by low voltage.

Logic controlled regulated power supply which produces a d.c. output potential which is stabilized at a predetermined value through the variation of the average efficaciousness of a train of rectified clock pulses. The level where the predetermined value is satisfied is sensed to produce a logic level which inhibits further clock pulse efficacy at least until such time as the d.c. output potential, as accumulated across a charge holding capacitor, dissipates to a level less than the predetermined value through the impedance of an external load whereupon the flow of clock pulses are resumed for at least the period of time necessary to integratively reaccumulate sufficient rectified charge in the charge holding capacitor to again exceed the predetermined value. This cycle of enablement and disablement of clock pulse flow continues ad infinitum thereby maintaining a relatively constant d.c. level across the terminals of the charge holding capacitor.

A testable load driving circuit apparatus includes a solid-state load driver for controlling AC current loads coupled in series with a winding of a saturable core reactor used for sensing the presence or absence of load current through a load current monitor which is coupled to another winding in the reactor. The load driving circuitry may be tested during circuit operation by injecting a signal of insufficient duration to substantially affect the load circuit.

A micropower DC/DC conversion system providing a stabilized voltage output at a predetermined voltage higher than that of the energy source. The system is powered by one or more primary cells in parallel or by a suitable battery, and the system is of special use with systems requiring low power at stabilized voltage which is substantially independent of the energy source impedance and load variations. According to the preferred embodiment of the system the output voltage stabilization is controlled by voltage detection circuit based on C-MOS inverters which allows extremely low power drain. The system is of special value for use with electronic implantable devices such as cardiac pacemakers.