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Description  |
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This invention relates to systems for the transfer and interchange of data
between at least two populations of persons.
Such systems are known. In particular, U.S. Pat. No. 3,702,464 describes a
system comprising:
On the one hand at least one portable device including a memory,
On the other hand, a plurality of geographically separated peripheral units
connected to a central computer comprising a central recording memory.
The peripheral units comprise control means allowing control of the data
between the central memory of the computer and the portable device,
provided that this latter is coupled to one of the peripheral units.
Such a system, whatever the degree of organisation of the portable devices,
of the peripheral units and of the central computer, presents a major
inconvenience. In practice, it requires a network of complex
interconnections between the central coordinating station and the
peripheral units. As a result the installation costs are high and on the
other hand the reliability is compromised by the likelihood of faults
arising in the interconnecting network, the probability increasing as the
complexity of the network increases.
It is an object of the invention to overcome the inconvenience of the known
system, while permitting data from geographically disparate sources to be
connected up to a central organism in an economic and reliable manner.
To remedy the inconvenience of the known systems it is proposed, contrary
to the tendency towards centralisation which are dominant at the present
time, to construct a plurality of independent devices, each autonomous,
comprising means (writing means, etc.) permitting data to be transferred
between the portable device and a cooperating apparatus at any position.
Thus, in accordance with a principal characteristic of the invention, a
system for exchanging and transferring data between at least two
populations of persons, the persons of each of these two populations being
geographically dispersed, comprises:
A plurality of independent data recording devices, distributed at definite
geographical positions,
A plurality of portable electronic devices, distributed among and carried
by the persons constituting one of the populations.
Each of the portable devices comprises:
A memory; preferably this memory is incorporated in an inaccessible manner
in the interior of the portable device; preferably likewise the memory is
inert, not requiring a power supply, and of a semi-conductor type,
Coupling means permitting any one of the portable devices to be temporarily
coupled at will with one of the data recording devices or with one of the
writing devices,
memory control circuits interconnected between the coupling means and the
memory;
the memory and the control means being constructed in the form of logic
microstructures.
The portable devices are arranged to store the data to be transferred in a
readily portable form.
Each data recording device comprises:
a means for reading the contents of the memory in a portable electronic
device while the latter is coupled with a data recording device.
means for recording the data contents of the memory in the portable
electronic device which is coupled with the said reading means.
With this combination of means, each person may receive, in the form of a
recording, the contents of the memories of each of the portable electronic
devices without it being necessary to pass through the intermediary of a
central computer.
In addition, so that each person of one of the population may be able to
receive the data of persons of the other population and vice versa, the
system additionally comprises, in accordance with an additional feature of
the invention, a plurality of independent writing devices; distributed in
geographically fixed positions; in addition, the memory of the portable
electronic device possesses programmable recording sections; each writing
device includes a writing means permitting data to be written into the
programmable memory of the electronic portable device when this latter is
coupled to the writing device. With this combination of supplementary
means it is possible to write data into the memory of each of the
electronic portable devices.
Preferably, the means for writing, reading and recording are interconnected
and contained in a single transfer device. This is particularly the case
for the applications envisaged hereinafter, but this particular
arrangement is not essential.
Such a system may be employed for various purposes; its use for keeping a
health record may be envisaged;
the patient possesses a health record (in the form of a portable electronic
device) containing in the memory the various medical details which concern
him,
the doctor whom he goes to consult who is not necessarily his usual doctor
-- possesses a specific data recording device which allows him to read the
contents of the memory of the record and to record in another memory at
his disposition the information of which he has need to make his diagnosis
and then to write into the memory of the health record the most recent
medical information concerning the patient.
In accordance with another principal object of the present invention the
data recording means comprises:
on the one hand a writing means situated in the interior of the specific
recording means,
on the other hand at least one portable electronic device comprising a
memory having programmable memory sections, especially sections
programmable in an irreversible manner; preferably this memory is an inert
memory, not requiring a power supply, of the semiconductor type;
preferably likewise it is incorporated in an inaccessible manner in the
interior of the said portable electronic device,
coupling means accessible on the exterior of the portable electronic device
connected with the memory and permitting it to be temporarily coupled at
will with the writing means of the said recording means,
memory control circuits interconnected with the coupling means and the
memory,
the memory and the control means being constructed in the form of logic
microcircuits, i.e. micro-structures.
With this construction, especially of the recording means, it is possible
to store, periodically to transfer, conveniently and in a reliable manner
towards a central computer, for example, the data to be passed on; it is
sufficient to transmit the portable electronic device, by messenger, by
post, by pneumatic tube, etc. to the site of the central computer; this
latter is constructed so that it is capable of reading the contents of the
memory in the portable electronic device.
It is stressed that this novel solution consisting in using two portable
devices and one transfer electronic device in place of a system of
interconnections is in fact more economical and more reliable than the
system of interconnection and that it is perfectly suitable for
transferring a small number of data items (scattered) with a relatively
unimportant lapse of time.
Such a system may be used to keep a bank account. For the special needs of
this particular banking application, the system is additionally arranged
to transfer the data in a confidential manner; to this end and in
accordance with an additional characteristic of the invention;
each of the said portable electronic devices includes another programmable
memory containing the identification data written in once for all,
each of the said transfer devices (for recording and/or writing) comprises
an identification comparator arranged to:
compare the identification data contained in the said other memory with
given data introduced into the transfer device by the bearer of the
portable electronic device,
to authorise the setting in operation of the transfer device only when
there is agreement between the compared data.
The operation to be performed for keeping a bank account and the manner in
which the system to be described may be used to keep a bank account will
be briefly reviewed:
1. The purchaser and holder of a payment card (the portable electronic
device) inserts this latter in the transfer device (likewise called
elsewhere the specific device) situated at a point of sale (more generally
the place at which the purchaser must settle for his purchases).
2. The transfer device checks the identity of the payer by comparing the
identification data contained in the payment card with the confidential
code introduced directly into the transfer device by the payer.
3. The transfer device determines the credit balance, starting from the
information contained in the card and comparing it with the amount of the
purchase introduced directly into the transfer device by the cashier.
4. The transfer device writes into the payers payment card the new balance
available (lower than the former balance).
5. The transfer device inserts in a memory which is available to the trader
(a memory which may be constructed in the form of a commercial portable
card) the banking coordinates of the payer and the amount of the purchase.
6. The trader later communicates to his banker the trading card containing
the banking coordinates of his clients and the amounts of their purchases,
so that the banker then causes the amounts of the purchases to be paid by
the bankers of the different payers and credits the account of the trader
with these amounts.
There will now be described by way of non-limiting example some embodiments
of the system according to the invention, reference being made to the
drawings, of which:
FIG. 1 shows a general functional diagram of a transfer device used to
dispense bank-notes, comprising means for reading, writing, recording,
data processing and an identification comparator;
FIG. 2 is a diagram explaining the operation of an embodiment of an
integrated circuit memory;
FIG. 3 is a simplified diagram of a sequential adder/subtracter;
FIG. 4 is a diagram reproducing in a synoptic manner the principal of the
data transfer system described with reference to FIG. 1;
FIG. 5 shows the block diagram of a simplified embodiment of data transfer
system;
FIG. 6 shows the block diagram of another simple embodiment of the data
transfer system;
FIG. 7 shows the block diagram of another embodiment of the data transfer
system, showing the special construction of the recording means;
FIG. 8 shows an embodiment of the data transfer and exchange system in
accordance with the invention, applied to a banking transaction between
two persons.
The description to be given below require the following general comments.
All the described embodiment are specifically intended for banking and
accountancy applications; as a result and in order to facilitate following
the description, there has broadly been used to explain their manner of
operation a terminology proper to banking and to the keeping of a bank
account. The described arrangements may, however, have quite different
applications and may be utilised in any application where it is necessary
to transfer data between persons at different locations and where it is
necessary to direct some or all of the data to a single central
organisation.
The electronic circuits of the portable electronic devices (memories, etc)
are, because of their banking application, incorporated in the portable
electronic devices in an inaccessible manner (in order that they cannot
readily be fraudulently used); the portable devices are conveniently in
the form of a flat rectangular card. The electronic devices are
incorporated in an inaccessible manner in the card, that is to say, so
that it is not possible to obtain access to the electronic circuits
without destroying the card. It is therefore particularly convenient for
the electronic circuits to take the form of logic microstructures
(integrated circuits) the components of which are hardly to be
distinguished under the microscope, and are encapsulated in an opaque
plastics resin. Other mechanical solutions can be envisaged, however. The
coupling means are the only elements providing access to the electronic
components contained in the card; such access may be obtained either
electrically or optically.
It should be noted, however, that these supplementary technical
precautions, indispensible in the case of banking applications, in order
to prevent attempts at fraud, may be superfluous in other applications
where the risk of fraud does not arise.
Finally, it should be noted that the inert integrated-circuit memories
employed in these embodiments and incorporated in the cards may be of
different kinds; particularly either of the programmable or reprogrammable
type. Such memory devices do not require any energy to store the
information. On the other hand, the writing of information generally
requires a substantial amount of energy (several watts instantaneously);
in consequence, the makes guarantee an indefinite storage time in the case
of programmable memories or an extremely long storage time, of the order
of several tens of years, in the case of reprogrammable memories. The
following references to memories of these types may be given:
Harris 7620, Monolithic Memories 6340, Texas Instruments 74 S 387, Intersil
5604, these non-erasible (destructible) memories are of the fusible or
junction breakdown type.
Intel 1702 and National Semiconductor 5230; these memories are erasible by
exposure to a source of ultra-violet radiation or of X-rays.
Memories with capacities of 4096 bits are currently fabricated by certain
makers, particularly in the field of MOS (erasible) memories. Modern
processes for the interconnection of integrated circuit chips thus allow
the construction at low cost of a memory block of 16 kilobits or 32
kilobits (4 or 8 chips) with an area of some tens of square millimeters,
so that such a memory block may be included in a card having the
dimensions of 2 .times. 60 .times. 80 mm.
As a result, these inert memories of semiconductor are particularly well
adapted for use, in preference to others, in storage systems for data
transfer in accordance with the invention; in particular, in applications
concerning banks and the keeping of a bank account.
A data-transfer device (specific device) will now be described with
particular reference to a bank-note dispenser, the description is given
with reference to FIGS. 1 to 3. The system to be described comprises two
distinct portions which, when in operation, are connected through an
interface denoted by a chain line. The two parts of the system are as
follows:
To the left of the chain line: a portable electronic device not requiring a
power supply, advantageously a ring, a card, a pendant, a pen;
incorporating a certain number of electronic circuits (carried out for
example as integrated circuits);
To the right of the chain line: a device to be controlled, advantageously a
bank-note issuing device, or a cash register in the case of direct use at
the point of sale; in this latter case, the debiting operation described
above is not accompanied by the supply of bank-notes, but the writing into
the cash register of the trader of information ultimately permitting the
latter to obtain from the bank of the carrier of the ring (etc), a
repayment in cash or script.
For clarity, we have restricted this description to the assumption of the
issue of bank-notes, otherwise the electronic arrangements are exactly
similar to those which would be used for a cash register.
The circuits in the ring comprise an identification memory 40, a debit
memory 50 and a credit memory 51. The system allows the following
operations to take place in the course of a single utilisation:
identification of the carrier of the ring, an operation which authorises
or rejects the remainder of the operation; possible reading of a document
relative to an authorisation of credit and copying of the sum to be
credited from this document into the credit memory in the ring; debiting
in cash money a required sum, if, and only if, the state of account of the
carrier of the ring allows it, taking into account the amount of the sum;
recording of the whole of this process, at the end of accounting and/or
possible final checking on a support such as a semi-conductor memory,
magnetic disk or tape, cassette, etc...
The operation is to be effected by the carrier of the ring are as follows:
Possible introduction of a credit authorisation into the reader 144
setting up on the keyboard 31 of the confidential identification number,
possible setting up of the sum to be debited on keyboard 63; these three
preliminary operations may be effected in a different chronological order;
finally, introduction of a projecting portion of the ring into a
corresponding receptical provided on the distributor box.
At the moment when the carrier of the ring effects the last operation which
he must perform, that is to say, the introduction of the ring into the
distribution box, all the operations set out above are effected very
rapidly. The arrangement will have finished its operation almost
instantaneously, permitting one of the following results, which are made
possible according to the choice of the carrier ring and the state of his
account;
simple verification of the state of the account by numerical display of the
sum on a display means 69;
verification of the state of the account after the introduction of a sum to
be credited by the introduction of an "authorisation of credit", which is
absorbed, erased or destroyed in some manner not shown after the sum to be
credited has been written into the credit memory of the ring;
verification of the state of the account after the introduction of credit,
and a debit operation in cash money by the distributor, the credit state
of the account after these two operations being necessarily positive or
zero;
verification of the state of account after cash money has been debited by
the distributor, as in the preceding case the debit will not take place
unless it corresponds to a positive or zero amount left in the account.
The different operating sequences of the arrangement, which are performed
by the arrangements to be described below, are as follows:
supply of the ring;
setting up the general control path for the different elements of the
arrangement by initiation of the switch 38;
operation of one of three memories (FIG. 2.);
operation of one of the two sequential adder/subtractors; (notes a - s/s)
(FIG. 3);
reading the previous credits;
reading the new credit;
reading the previous debits;
reading the new debits.
The note distributor device includes a power oscillator 150 which feeds a
winding 151. When the ring is fitted to the distributor, the primary
winding 151 is coupled to a secondary winding 105 which forms a part of
the circuits in the ring; this winding thus provides, by way of a
rectifier device comprising a diode 106 and a non-capacitive electronic
filter 107 a direct voltage for the different supply circuits of the ring.
Possibly, this electro-magnetic coupling may be replaced by an optical
coupling, the elements 150 and 151 being replaced by a light source, and
the winding 105 by an electro-voltaic pile. The coupling of the ring and
the distributor is effected simply by introducing a projecting portion
forming a part of the ring into a corresponding receptacle provided on the
distributor box. The effect of this introduction is to mechanically close
a contact 27, which forms part of a general supply arrangement (not shown)
for the circuits of the note distributor. Simultaneously, a delay device
28 is initiated which applies a level 1 to a first input of a OR gate 41;
this one level is maintained during a time sufficient for the
identification of a carrier of the ring to be effected normally; it should
be noted that the second entry of the OR gate 41 which corresponds to the
output of the trigger 42 is then set to nought by the operation of the
trigger 42 produced by the appearance of a one level at its input CL by
way of an OR gate 86. If this attempted identification is successful (it
will be seen later in what conditions and how this is effected), the feed
connection is maintained until the end of the operation of the
distributor, thanks to the presence of a one level on the second input of
the OR gate 41.
The absence of this signal, which denotes that the user has employed a
false identification number, on the other hand, suppresses the power
supply by the presence of a zero level at the two inputs of the OR gate
41, the level one on the first entrance falling back to zero and the level
one on the second entrance not having been established so that the note
distributor cannot be made use of. The practical contruction of the note
distributor 28 is well known in the art and does not form a part of the
present invention.
It should be noted that the arrangement here described is carried out using
positive logic.
Setting up the General Control Channel
When a logic level 1 appears at one of the two inputs of the OR gate 41, it
is transmitted through this gate to the AND gate 34 and, in parallel, to a
rising monostable trigger 35; the rising monostable trigger 35, the stable
state of which is indicated with respect to each of the two inputs by one
and nought, sends an impulse of complementary value (1 on the output
marked 0 and 0 on the output marked 1) in response to the appearance of a
rising edge at its input; for the duration of the impulse emitted by the
monostable trigger 35, the output marked 1 transmits a zero logic level to
a second input of the AND gate 34 which thus remains closed; the second
output of the rising monostable trigger 35 sends a positive impulse to the
reset input of counter 36, which controls the stepping switch 38. At the
end of the impulse emitted by the rising mono-stable trigger 35, the
stable state 1 appears at the output marked 1 of this latter, which has
the effect of opening the AND GATE 34. This then allows the passage of a
first impulse provided by a clock oscillator 33; this impulse, transmitted
to counter 36, causes the stepping circuit 38 to move to its first
position, the output position marked 0 corresponding to the conductor
marked t and numbered 160; it is transmitted simultaneously to the input
of the descending mono-stable trigger 36, which functions simultaneously
to the ascending mono-stable trigger 35, with the only difference that it
yields an output impulse only for a descending edge as its input; this
impulse, positive at the output marked 0 of the device 37, is transmitted
by way of the stepping switch 38 to the output marked 0; after this
impulse, this part of the apparatus remains inactive until the appearance
of the subsequent impulse emitted by the clock oscillator 33 and the cycle
repeats, identically to the previous cycle, the counter 36 causing the
stepping switch 38 to pass from the output marked 0 to the output marked
1, the said following impulse emitted by the oscillator 33 being
transmitted with delay and after being re-shaped by the descending
mono-stable trigger 37, to the output marked 1 (generaly reset RG marked
161) of the stepping switch 38; the operating cycle is thus described
successively for the ten output states of the stepping switch 38, the
eight latter outputs all transmitting a positive impulse to the same
conductor of the general clock (162) by way of the OR GATE 39; it should
be noted that the outputs state marked 9 of the stepping switch 38 is
immediately followed, in the cyclic operation preceding the described, by
the output state mark 0; that is by that part of the arrangement which
effect the control of the system during the whole of its operating time,
as will be seen below.
In addition to the supply to the ring circuits, the transmission of data
between the ring and the distributor is effected in both directions by
optical coupling between light-emissive diodes and photo diodes. Reading
the confidential identification number:
after the appearance of a positive impulse at the 0 output of the rising
mono-stable trigger 35, a logic level 1 is transmitted by way of the OR
GATE 60 and the optical coupling 45 to the memory reset input, which sets
it to the first page of credit memory 50 and of debit memory 51, to
initiate the subsequent process of reading (by `page` there is to be
understood an assembly of several memory stages in parallel, each of them
corresponding to a non-conductive or conductive state, according to
whether it has been written or not in an irreversible manner). This logic
signal also sets to the same zero state of count the sequential
adder/subtractors 32 and 49 and resets the counter 47 to zero; as to the
memory 40, it is permanently set to the first page by a constant one level
on its memory reset input (a level denoted by a plus sign in FIG. 1), for
it contains only a single page which in principle and preliminarily is
written for the duration of the life of the ring, which memory contains
the confidential identification number of its bearer, written at the time
when the account is created. It should be noted that the confidential code
is devised in a non-representative manner, so that it represents the
carrier of the ring as well as his bank.
The memory 40 in the ring (FIG. 2) is permanently in the read condition
owing to the presence of a zero level at its read-write input, which
employes the closure of the mechanical contact 3 and the inhibition of the
latches 2, the eight-bit counter 1 followed by the latches 2 serves to
address the memory 5 (a single address here, which is that of the first
page; for the credit and debit memories, the passage from one page to the
other is made at the beginning of each clock cycle by an impulse at the
input RG (161), an impulse delayed by the descending mono-stable trigger
88 which causes the address counter 1 to advance one step; the first
impulse which appears on the conductor 16 resets the four-bit counter 6
controlling the output stepping switch 4 and causes the counter 1 to
advance one step, after having been delayed by the descending mono-stable
trigger 88. In accordance with their order of arrival, the clock impulses
detect in the selected page of the memory module the value of the
different bit present at the output considered, from the bit of greatest
weight to the bit of least weight, which are transmitted in sequence
through the coupling 104 to the add-subtract circuit 32 which determine by
binary parallel counting a number x which is sent to the input of a
comparator 30; at the other input of the comparator 30 there is already
present in the same form a number y, which has been transcoded in a manner
not shown starting from the identification number previously composed on
the decimal keyboard 31 by the carrier of the ring, in case of equality of
x and y, the comparator 30 sends by way of the AND GATE 85 a one level to
the "preset" input of the bistable trigger 42, which changes state,
applying a logical one level from its output to the input of the OR GATE
41, which assures the continuing operation of the clock 33 after the delay
circuit 28 has ceased to operate. The presence of the AND GATE 85 requires
the carrier of the ring to compose his confidential code within a
predetermined delay period, corresponding to the delay time of the delay
circuit 28.
Operation of sequential add/subtract identification circuit 32 (FIG. 3):
In this particular case the element 32 operates solely as an adder; it is
maintained in the positive counting condition by the presence of a one
level permanently added up-down counting input marked c/d, symbolised by a
plus sign in FIG. 1. It comprises essentially a 16-bit up-down counter 11
(of which only the eight least significant bits are employed here) to
which are directed, in the presence of a positive information bit at the
input of the AND GATE 10 originating from a memory 40, impulses
originating from the oscillator 15 by way of the AND GATE 14. The general
reset signal arising on conductor 161 closes the AND GATE 14 by way of the
OR GATE 16 and the bistable 13 and resets the four-bit counter 12 to zero,
which sets the stepping switch 9 to its "off" condition mark 0; the first
clock impulse causes the switch 9 to advance one step, causing it to pass
to its one input, by operating on the counter 12, and causes the element
13 to change state, which suppresses the inhibiting input at the input of
the AND GATE 14, which allows the passage of impulses from the oscillator
15, which is 300 times more rapid than oscillator 33; before the second
clock impulse, 128 impulses from the oscillator 15, in the present case,
introduced by way of the AND GATE 10 into the 16-bit up-down counter 11;
at the end of the 128 impulse, the frequency divider 20 sends a logic
level 1 to the input marked 1 of the switch 9, which inhibits the AND GATE
14 by causing the trigger 13 to change state by way of the AND GATE 16;
the system remains inactive until the appearance of the second clock
impulse which places the switch 9 into its input state 2 and the preceding
cycle is repeated; the following information arriving at the gate 10
corresponds to the reading of the value of the bit of weight immediately
lower than that of the bit of greatest weight (second bit on the first
page of the memory 40); the confidential identification number is thus
read, translated into a number of impulses equal to its value, written in
binary code in a stable manner into the device 11 and transmitted in
parallel to the x input of the comparator 30 (see FIG. 1). The delay
register 17, having series input and parallel output (FIG. 3), followed by
latches 18 and by the OR GATE 19, provides a one logic level at the end of
an empty page, that is to say, of which all the bits contain the
information 0, nothing having been written therein. This zero detector
arrangement, mark DZ, is not utilised here; on the contrary, it is in the
adder/subtractor 49, as will be seen below.
Reading previous credit (see FIG. 1)
After a logic level 1 appears at the output of the comparator 30, it is
transmitted by way of AND GATE 85 (the delay circuit 28 being
theorectically not yet stopped), which corresponds to the preset input
mark PR of the bistable trigger 42; the output of this latter trigger,
passing from 0 level to 1 level, maintains the operation of the general
clock until the end of the operations of the whole distributor; this level
1 is transmitted to one input of the AND GATE 87, thus keeping it open
until the end of the operation of the device, the devices 50, 51, 49, 47
and subsequently 46 and 48 have already been reset to zero as has been
seen above; at the beginning of the general clock cycle following the
cycle of identification of the carrier of the ring, the information
contained in the credit memory 50 are introduced into the sequential
adder/subtractor 49 through the intermediatory of the output S of the
memory 50 and the coupling 119, according to a method identical with that
of reading the confidential identification number during the first clock
cycle; the passage from one page of the memory 50 to the following page is
effected, at the level of the memory 50, by an impulse provided at the
beginning of the subsequent clock cycle on the conductor RG 161 by way of
the coupling 44; the sum of the values of all the previous credit
introduced into the credit memory in the manner described below, appears
in a stable manner at the output of the sequential adder/subtractor 49, in
binary forms; it is displayed on a display device 69 after transcoding
(not shown), this type of operation being well known in the art. The same
remark relating to the inverse transformation is also true at the level of
the of the decimal counting system 31 and 63; it is to be noted that
during the operation of reading the credit the sequential adder/subtractor
49 is in fact in a counting condition, owing to the presence of a one
logic level at its input by way of the output mark 0 of the switch 48 and
and AND GATE 52; after the arrival of the value contained in this last
written page of the memory, the page which is read on the following clock
cycle is an empty page, which is detected in the sequential
adder/subtractor 49 by the presence of a 1 logic level appearing at the
detector output marked Dz by way of the delay register 17 with series
input and parallel output (FIG. 3), and the eight latches 18 operated at
the beginning of the second clock cycle by the T output and the NOR gate
19. This one level inhibits the clock impulse RG 161 by way of the output
marked 0 of the rising monostable 81 (FIG. 1) and the AND gate 82 so as to
retain the address in the memory 50 and permit the writing of a possible
new credit required by the carrier of the ring on that empty page.
Writing of new credit
The same 1 logic level indicating zero detection, passing through the OR
gate 108 causes the counter 47 to advance one step, and in consequence
sets the switch 46 to its input position marked 1 and the switch 48 to its
output position marked 1, which keeps the adder/subtractor 49 in the
condition of positive counting owing to the presence of a 1 logic level on
the other input of the OR gate 52; this same 1 logic level is transmitted
by way of the coupling 57 to the read write input of the credit memory 50,
which places this latter in the writing condition by supressing addressing
at the level of the latches 2, opening of the mechanical contact 3 and
opening of the AND gate 7. The entry of the information in the serial mode
into the page in which it is to be written is then effected by way of the
switch 113 (FIG. 1) both the control of the credit memory by way of the
coupling 120 and also that of the sequential adder/subtractor 49 by way of
the switch 46 being effected while the switch 113 is controlled by the
counter 115, which in turn is driven by the general clock; the value of
the amount to be credited is then written into the first empty page in the
credit memory 50 and added to the sum preceedingly displayed on the
display device 69 by way of the 16-bit up-down counter of the sequential
adder/subtractor 49. The end of the written page is detected by the AND
gate 59 the two inputs of which are both at a logic level 1 at this moment
the first input being the output marked 1 of the switch 58, the second
being the output of the output of greatest weight of the counter 115 by
way of the descending monostabled 150, the exact purpose of which is to
detect the passage of the counter 115 from state number 7 to state number
0 when reading and writing the new credit into the memory 50 is
terminated, the corresponding value is erased in a manner not shown by the
reading of the credit register 114 by the appearance at its input E of a
logic level 1 transmitted by the conductor 93. The output of the AND gate
59, taken to logic level 1, then resets to zero the credit and debit
memories by way of the OR gate 60 and the coupling 45 and, by way of the
OR gate 108, causing counter 47 to advance one step.
Reading of former debits
The new position of the counter 47 sets the switch 46 into its input 2
state (reading the memory debit 151), establishes the output 2 of the
decoder 48 in the logic state 1, the 0, 1 and 3 outputs of this latter
being at the logic level 0, which puts the sequential adder/subtractor 49
in a condition of counting down by the presence of a 0 level at its C/D
input; the reading of the previous debits is then effected similarly to
the operation effected previously on the credit memory 50, by way of the
coupling 122, the number representing the sum of these debits being
subtracted from the number already written in binary representation into
the 16-bit up-down counter of the sequential adder/subtractor 49, that is
to say subtracted from the number preceedingly displayed in the display
means 69. The first blank page of the debit memory is detected by the AND
gate 109 by the presence at the Dz output of the sequential
adder/subtractor 49 of a logic level 1; it should be noted that at the
moment when this information appears, the outputs of the sequential
adder/subtractor 49 are in a numerical state representing in stable binary
notation, corresponding to the operation
X = (sum of previous credits) + (new credit) - (sum of previous debits)
This value X being necessarily positive, even in the case where the new
credit is zero; on the assumption of a previous nil balance and the
writing-in of a new nil credit, the value X will obviously also be nil,
which constitutes one limiting case.
The value of the amount intended to be finally debited by the
note-distributor, set up before the introduction of the ring into the
distributor by its bearer on the keyboard 63 in decimal notation, is
compared in its binary form Y with the X by the binary comparator 110; at
the moment when the logic level 1 appears at the output 3 of decoder 48,
this occuring when the last figure of counter 47 is set by the arrival at
the output of the gate 109 of a logic level 1, by way of gate 108, the
comparison of X and Y creates a new logic level equal to one on the single
output of the comparitor 110 if and only if X is greater than Y; at this
moment the counter 115 which controls the successive input states of
switch 116 having been reset to zero at the moment when the counter 47
entered its last state, the distributor is in a condition to write in the
new debit.
Writing-in of new debit
In practice, the switch 46 being in its 3 input condition, is connected
with the debit memory 51 by way of the coupling 124 to write-in a new
debit of which the amount is simultaneously deducted in the same manner as
above by the sequential adder/subtractor 49 in stable binary notation and
subtracted in the display device 69. It should be noted that the rising
monostable trigger 81 plays the same part for the debit memory 51 as it
played for the credit memory 50, that is to say that writing into the
memory is effected always on the first empty page detected and not on that
following, which is also a blank page. On the other hand, the output 3 of
decoder 48 being at logic level 1 sets the debit memory 51 in a writing
condition during this last stage of operation of the apparatus, by way of
the coupling 123, at the end of this phase a general stop command is
produced by tripping of the trigger circuit 42 by the presence of a 1
logic level at its "clear" input CL by way of the OR gate 86, following
upon release of the AND gate 111, which itself was made conductive by the
presence at its input of a positive impulse arising at the nought output
of decending monostable 140, acting in the same manner as at the end of
writing a new credit into the memory 50. The operation of delivering the
bank-notes not shown, occurs at the same time as this writing-in of the
new debit into the debit memory 51, in accordance with the sum of which
the amount has been previously written in decimal notation by the carrier
of the ring, by the use of the keyboard 63, and tested as we have
previously seen | | |
