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Description  |
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BACKGROUND OF THE INVENTION
This invention relates to an operation program-presetting system for
automatically operating an external appliance according to a preset
program and more particularly to an operation program-presetting system
capable of selecting the desired television channel and extinguishing any
display according to a preset program.
Operation program-presetting systems known to date include a type provided
with mechanical switches coupled with a timer and a mechanical type using
an electric motor. However, the prior art operation program-presetting
systems containing mechanical elements are obviously handicapped by the
drawbacks that they fail to have a large number of programs preset
therein, and essentially have a short effective life and moreover would
become bulky if they were designed for the presetting of many schedules.
Various forms of electronic operation program presetting system have
already been proposed. But all these electronic types involve complicated
operating processes. Particularly, the electronic type using a keyboard as
a program input device is accompanied with too complicated a process of
presetting various schedules for a general household user to accept it.
It is accordingly the object of this invention to provide an operation
program-presetting system facilitating the supply of program information,
particularly time data, thereby eliminating the above-mentioned
shortcomings of the prior art apparatuses.
SUMMARY OF THE INVENTION
According to this invention, at least twelve program input switches are
arranged in the same order as the time-indicating notations on a clock
dial. The program-presetting system of this invention is provided with a
device for discriminating some of the signals generated by the successive
depression of the selected ones of the twelve input switches as time data
denoting the "hour", "minute" and the others of said successively
generated signals as those instructing the control of external appliances.
Particularly, the presetting of time data can be easily and quickly
effected simply by depressing the selected ones of said twelve input
switches marked by numerals of 1 to 12 which are arranged in the same
order as the time-indicating notations on a clock dial and regarded to
represent time divisions such as the hour and minute.
Where the operation program-presetting system of this invention is applied
to the selection of television programs, the selected ones of the twelve
pushbutton or touch type channel selection switches are depressed as
program input means after a program switch is thrown to the "program"
side, eliminating the necessity of providing any additional input device
such as a keyboard.
Though the following description refers to the case where the operation
program-presetting device of this invention is applied to a television
receiver, it will be noted that the invention is not limited thereto, but
may be accepted for use with any other external appliance.
BRIEF DESCRIPTION OF THE DRAWING
FIG. 1 is a block circuit diagram of the channel selection device of a
televison receiver using the operation program-presetting system of this
invention;
FIG. 2 is a detailed circuit diagram of a memory used in FIG. 1;
FIG. 3 is a front view of a television receiver using the operation
program-presetting system of the invention;
FIG. 4 is a circuit diagram of the memory of the invention and its control
device;
FIG. 5 presents a set of coded program information stored in the
corresponding addresses of the memory of FIG. 4;
FIG. 6 is a block circuit diagram of the input selector of FIG. 4;
FIG. 7 is a block circuit diagram of the output selector of FIG. 4;
FIG. 8 is a block circuit diagram of a preset program display device when
the operation program-presetting system of the invention is applied for a
television receiver;
FIG. 9 shows the relationship between the display segments of a character
pattern to be displayed on the Braun tube screen of FIG. 8 and the
corresponding raster;
FIG. 10 sets forth the arrangement of another embodiment of the
channel-selecting device of FIG. 1; and
FIG. 11 is a fractional block circuit diagram of another embodiment of the
memory including its control device of FIG. 4; where the channel-selecting
device of FIG. 10 is applied.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
Memory circuits denoted by referential numerals M1 to M13 in FIG. 1 are
illustrated in FIG. 2. These memory circuits are each known as
master-slave type flip-flop circuits. Each of said flip-flop circuits
consists of a master flip-flop circuit 1 (hereinafter referred to as "a
master circuit"), a slave flop-flop circuit 2 (hereinafter referred to as
"a slave circuit") and a switch circuit 3 for connecting both flip-flop
circuits 1, 2 together. The master circuit 1 is a JK flip-flop circuit
supplied with J.sub.1, K.sub.1 signals (J.sub.1 and K.sub.1) represent
input signals or terminals). These J.sub.1, K.sub.1 signals are controlled
by a signal from the terminal FwP (or denoting an input signal) in AND
circuits 4, 5. The master circuit 1 is further provided with J, K input
terminals J.sub.2, K.sub.2 (or denoting input signals). The input signals
J.sub.2, K.sub.2 are controlled by a signal from a terminal RevP (or
denoting an input signal) in AND circuits 6, 7, and thereafter delivered
to NOR circuits 8, 9 (FIG. 2) each of 3-input terminal type jointly
constituting a flip-flop circuit (hereinafter referred to as an "FF
circuit"). The switch circuit 3 is formed of AND circuits 10, 11
controlled by a signal from a CP terminal. Output signals Qm, Qm from the
master circuit 1 are selectively supplied to NOR circuits 12, 13 each of
3-input terminal type constituting the slave circuit 2. One NOR circuit 12
is supplied with a signal from a set terminal S and the other NOR circuit
13 is supplied with a signal from a reset terminal R, thereby setting or
resetting the slave circuit 2 as required. Both output signals Qn, Qn(or
denoting terminals) from the slave circuit 2 are conducted to the
corresponding terminals Qn, Qn. One output signal Qn is sent to a terminal
CHn (n denoting the specified number of a television channel being preset)
as a channel-selecting signal. The other output signal Qn is carried to a
terminal Exn through an inverter 14. The Memories M1 to M13 may be adapted
to control a television receiver in such a manner that the channel
selection operation is conducted by remote control when the receiver is
not controlled by preset programs. In this case, a remote control unit
having FwP and RevP push button is provided apart from the receiver. The
terminals FwP and RevP of the memory M1 are connected to the remote
control unit by wires. When the button FwP is pushed, the terminal FwP of
the memory M1 is supplied with a binary signal 1, thereby to advance the
channel number by one step in the forward direction. On the other hand,
when the push button RevP is actuated the terminal RevP of the memory M1
is supplied with a binary signal 1, thereby to retreat the channel number
by one step in the backward direction.
Now let it be assumed that the terminal FwP is supplied with a binary
signal of 1. Then items of information supplied to the terminals J.sub.1,
K.sub.1 are stored in the master circuit 1. Where, under this condition,
the terminal CP is supplied with a 1 signal, then the data stored in the
master circuit 1, namely, output signals Qm, Qm therefrom are shifted to
the slave circuit 2. This slave circuit 2 produces output signals
corresponding to the information items stored therein at the terminals Qn,
Qn, CHn, Exn. The information stored in the slave circuit 2 is reset, for
example, to a level of 0 upon receipt of a signal at the reset terminal R.
Upon receipt of a signal at the set terminal, the slave circuit 2 is
stored with information of 1.
FIG. 1 shows an input means including thirteen units of the above-mentioned
memory circuit corresponding to the number of television channels which
are denoted by referential numerals M1 to M13. In FIG. 1, referential
numerals Q.sub.1 to Q.sub.13 and Q.sub.1 to Q.sub.13 denote output signals
from the slave circuit 2 of FIG. 2 or the output terminals thereof. The
memory circuits M1 to M13 are connected as follows. For example, the
output terminals Q.sub.2, Q.sub.2 of the second memory circuit M2 are
connected to the input terminals J.sub.1, K.sub.1 of the third memory
circuit M3 and also to the input terminals J.sub.2, K.sub.2 of the first
memory circuit M1. This form of circuit connection applies to the other
memory circuits than the first and thirteenth memory circuits M1, M13. The
input terminals J.sub.1, K.sub.1 and output terminals Q.sub.1, Q.sub.1 of
the first memory circuit M1 are connected to the output terminals
Q.sub.13, Q.sub.13 and input terminals J.sub.2, K.sub.2 of the thirteenth
memory circuit M13. The terminals FwP, RevP, CP, R are connected together
throughout the memory circuits M1 to M13. Output signals from these
terminals are supplied in parallel to the memory circuits M1 to M13. The
Exn terminals (or denoting output signals) of the memory circuits M1 to
M13 are connected to the input side of a parity signal generator P. This
parity signal generator P is formed of, for example, and exclusive OR
circuit and inverter circuit combined together, and generates an output
signal when the input terminals Ex.sub.1 to Ex.sub.13 are supplied with an
even number of binary signals 1. This output signal is conducted to the
reset terminals R of the memory circuits M1 to M13.
The output terminals CH.sub.1 to CH.sub.13 of the memory circuits M1 to M13
are connected to one terminal each of the stationary resistors of voltage
dividers VD.sub.1 to VD.sub.13 provided to match the memory circuits M1 to
M13. The other terminal of said stationary resistors is connected to a
negative power source -VDD. Signals denoting fractions of a uniform
voltage drop resulting from the stationary resistors are drawn out in
different prescribed voltage division ratios by means of the corresponding
sliders. These signals are joined together through diodes D.sub.1 to
D.sub.13, and further conducted in the form of D.C. back bias voltage to a
variable capacity diode 22 constituting the tuning circuit 21 of a
television tuner through a resistor. Said tuning circuit 21 includes, for
example, a coil 23 and D.C. suppression condenser 24. Though only one unit
of said tuning circuit 21 is shown in FIG. 1, a plurality thereof are
practically used with an ordinary television tuner for high frequency
amplification and local oscillation. The output terminals CH.sub.1 to
CH.sub.13 of the memory circuits M1 to M13 are connected to the first
stationary contact 16 of channel-selecting pushbutton switches SW.sub.1 to
SW.sub.13. Each channel-selecting pushbutton switch SW has a second
stationary contact 25, a third stationary contact 26 and a movable contact
27 for selectively connecting the third contact 26 to the first stationary
contact 16. The second stationary contact 25 is connected to the third
contact 26 of the adjacent channel-selecting pushbutton switch. The third
stationary contact 26 of the extreme left channel-selecting pushbutton
switch SW.sub.1 is connected to a positive power source +VDD. The second
stationary contact 25 of the extreme right channel-selecting pushbutton
switch SW.sub.13 is connected to an input terminal 101 (FIG. 6) through a
terminal 28. The memory circuits M1 to M13 are connected to the positive
and negative power sources +VDD, -VDD respectively.
There will now be described the operation of the channel-selecting device
of FIG. 1. Where, in FIG. 2, the terminal FwP is supplied with a pulse of
1, then items of information supplied to the terminals J.sub.1, K.sub.1
are stored in the master circuit 1. Where, under this condition, the
terminal CP is supplied with a clock pulse, then the information items Qm,
Qm stored in the master circuit 1 are shifted to the slave circuit 2. The
information items stored in the slave circuit 2 deliver the corresponding
output signals to the terminals Qn, Qn, CHn, Exn. Said information items
stored in the slave circuit 2 are reset by a reset signal supplied to the
reset terminal R. Or upon receipt of a set signal at the set terminal S, a
binary signal of 1 is forcefully stored in the slave circuit 2. Where the
terminal RevP is supplied with a pulse of 1, the items of information
supplied to the terminals J.sub.2, K.sub.2 are stored in the master
circuit 1. The information items thus stored in the master circuit 1 are
shifted to the slave circuit 2 upon receipt of a clock pulse at the
terminal CP.
Thirteen units of the memory circuit shown in FIG. 2 are connected together
as illustrated in FIG. 1. Each time, therefore, the terminal FwP of FIG. 1
is supplied with a clock pulse, information items of 1 stored in the
memory circuit M1 are forward shifted through the following memory
circuits M2 to M13 in succession. Conversely, where the terminal RevP is
supplied with a pulse, then information items of 1 stored in the memory
circuit M13 are backward shifted to the memory circuit M1. In this case, a
memory circuit, for example, M3 stored with information items of 1 has its
terminal CH.sub.3 raised in potential. This elevated potential is
connected into a voltage having a value corresponding to the specified
number of a television channel being preset by the corresponding voltage
divider VD3, and conducted to the variable capacity diode 22 of the tuning
circuit 21 through the corresponding diode D.sub.3.
The above-mentioned circuit arrangement enables the authorized television
broadcasting channels to be automatically selected successively in the
increasing or decreasing order of the designated numbers of said channels
by supplying a pulse to the terminal FwP or RevP and also any of said
channels to be picked up separately at random regardless of the
above-mentioned order by depressing the corresponding one of the
channel-selecting pushbutton switches SW.sub.1 to SW.sub.13. The second
and third stationary contacts 25, 26 of the channel-selecting pushbutton
switches SW.sub.1 to SW.sub.13 are always connected by the movable contact
27. On the other hand, the first and third stationary contacts 16, 26 of
any of said switches are connected together only while it is operated.
Depression of, for example, the channel-selecting pushbutton switch
SW.sub.3 causes the output terminal CH.sub.3 of the memory circuit M3 to
be connected to the positive power source +VDD and the slave circuit 2 of
the memory circuit M3 to be forcefully brought to a state stored with
information of 1. Where, under this condition, any other memory circuit is
already stored with information of 1, then two of the input signals to the
parity signal generator P are brought to a level of 1, causing an output
signal from said generator P to be conducted to the reset terminals R of
all the memory circuits M1 to M13. As the result, the memory circuit
previously stored with information of 1 is immediately reset. Since,
however, depression of the channel-selecting pushbutton switch SW.sub.3 by
a user continues relatively long, the memory circuit M3 connected to said
switch SW.sub.3 continues to be stored with information of 1. During this
depression, the number of input signals of 1 to the parity signal
generator P is reduced to one, causing said generator P to stop the
generation of any output signal. Even after release of the
channel-selecting pushbutton switch SW.sub.3, therefore, the memory
circuit M3 remains in a state stored with information of 1.
FIG. 3 is a front view of a television receiver provided with a television
receiving program-presetting system according to this invention. A
channel-selecting switch panel 32 is provided on the upper right side of
the Braun tube. This channel-selecting switch panel 32 has the twelve
channel-selecting pushbutton switches SW.sub.1 to SW.sub.12 of FIG. 1
provided in a circular arrangement. The marks one to twelve indicated on
the switch panel 32 represent not only the channel-selecting pushbutton
switches SW.sub.1 to SW.sub.12 of FIG. 1, namely, the designated numbers
of the television channels being preset but also the time at which the
user desires to begin to listen in to broadcasting through said channels
by the proper operation of said pushbutton switches, the details of said
operation being described later. The numerals denoting the
channel-selecting pushbutton switches are arranged in the same order as
the similar rotations given on a clock dial. Namely, the marks twelve and
six are positioned at the top and bottom of the switch panel 32, and the
marks nine and three on the left and right sides of said panel 32. Thus
the numerals denoting the channel-selecting pushbutton switches
concurrently represent the divisions of time, namely, hours and 5-minute
units shown on a clock dial. A desired television program is preset by
operating the pushbutton switches in the later described manner with
correlationship kept between the designated number of the television
channel through which said desired program is broadcast and the time at
which the user wishes to begin to listen in to said program.
A pushbutton switch 33 marked "OFF" and provided at the center of the
switch panel 32 corresponds to the switch SW.sub.13 of FIG. 1, and when
depressed in advance, renders the television receiver inoperative at the
preset time.
Three changeover switches 34 to 36 are provided below the channel-selecting
pushbutton switch panel 32. The first changeover switch 34 is switched
over to the "Normal" side when the television receiver is used as an
ordinary one and to the "Program" side when information is to be supplied
to said receiver for the presetting of a desired program. This first
changeover switch 34 is hereinafter referred to as "a program switch". The
second changeover switch 35 is thrown to the "AM" side when the time data
associated with a desired program being preset (hereinafter referred to as
"a program time") lies in the former half of the day and to the "PM" side
when said program time falls within the latter half of the day. This
second changeover switch 35 is hereinafter referred to as an AM-PM switch.
The reason for providing said second switch 35 is that where the aforesaid
channel-selecting pushbutton switch panel 32 is used as a clock dial, it
is necessary to distinguish between the first and second halves of the
day. The third changeover switch 36 is used to adjust the current time
(shown in FIG. 3, numeral 40) purposely displayed on the Braun tube of a
television receiver to the correct time if said current time is fast or
slow. This third changeover switch 36 is hereinafter referred to as "a
time-adjusting switch". Three more pushbutton switches 37-39 are provided
in addition to the above-mentioned changeover switches 34 to 36. The first
pushbutton switch 37 is intended to shift a step bar 41 for indicating the
address position on the Braun tube screen 31 at which the succeeding
preset program is to be displayed. Each time said first pushbutton switch
37 is depressed, the step bar 41 advances one step on the Braun tube
screen 31. This first pushbutton switch 37 is hereinafter referred to as
"a step switch". The second pushbutton switch 38 is depressed to show on
the Braun tube screen 31 either the current time 40 alone or both the
current time and the designated number (not shown in FIG. 3) of any
channel through which broad-casting now happens to be carried on. This
second pushbutton switch 38 is hereinafter referred to as "a time display
switch". The third pushbutton switch 39 is used to change the display
position of the current time 40 to any of the four corners of the Braun
tube screen 31. This third pushbutton switch 39 is hereinafter referred to
as "a time display position switch". The front panel of an ordinary color
television receiver is fitted with various knobs, some of which are
neither shown in FIG. 3, nor described herein.
Where, with the television program-presetting system of this invention, the
program switch 34 is thrown to the program side, and the selected ones of
the pushbutton switches one to twelve on the switch panel 32 which
represent the hour, minute and channel number being preset are depressed
in the order mentioned, then the memory built in the program presetting
system is stored with items of program information consisting of said
hour, minute and channel number. These items of information thus stored
are immediately displayed on the Braun tube screen 31 as illustrated in
FIG. 3.
FIG. 4 is a block circuit diagram of the memory and its control device
included in the television program presetting system of this invention.
The output terminals CH.sub.1 to CH.sub.13 of the memory circuits M1 to
M13 of FIG. 1 are jointly connected to a means for generating coded
signals such as an encoder 51 shown in FIG. 4, and also to the output side
of a decoder 52. The encoder 51 detects that of the output terminals
CH.sub.1 to CH.sub.13 of the memory circuits at which an information
signal of binary code 1 appeared and converts the referential numeral of
said detected output channel, namely, the designated number of a preset
channel into coded signals, for example, 4-bit digital information. The
decoder 52 deciphers, as later described, the 4-bit digital information
delivered to its input side, and supplies the deciphered result to the
specified one of the output terminals CH.sub.1 to CH.sub.13 of the memory
circuits M1 to M13 in the form of an information signal of binary code 1.
An output signal from the encoder 51 is conducted to a gate circuit 54
through the corresponding signal bus line 53. An output signal from the
gate circuit 54 is delivered to a channel number register 56 through the
corresponding signal bus line 55. Said register 56 is temporarily stored
with the number of a television channel, and sends an output signal
denoting the channel number to a switching gate circuit 59 through bus
lines 57, 58. The switching gate circuit 59 selects one from among a
plurality of sets of input information items, and delivers a siganl
denoting the selected set of information items to the output side. An
output signal from said switching gate circuit 59 denoting said selected
set of information items is transmitted to the decoder 52. The aforesaid
gate circuit 54 and switching gate circuit 59 are controlled by a signal
supplied from the program switch 34 through the input terminal 60 of the
input selector 62. This control signal has a binary level of 1 or 0
according as the program switch 34 is thrown to the program or normal
side. The gate circuit 54 and switching gate circuit 59 have the gates
closed while the input terminal 60 of the input selector 62 is supplied
with a signal of 1 and opened while said input terminal 60 is supplied
with a signal of 0. While the program switch 34 is thrown to the normal
side, the number of any channel through which broadcasting is carried on
is coded by the encoder 51. The signal thus coded passes through the gate
circuit 54 to be stored in the channel number register 56. When the
program switch 34 is thrown to the program side, the gate circuit 54 and
switching gate circuit 59 have the gates closed. Accordingly, an output
signal from the encoder 51 is delivered to an input selector 62 through
the corresponding bus line 61. The input selector 62 is supplied with a
control signal from the input terminal 60 of the input selector 62,
thereby conducting input information from the bus line 61 to the output
bus lines 63, 64, 65 when a signal from the input terminal 60 has a level
of 1 (program). When an output signal from the input terminal 60 has a
level of 0 (normal), then the input selector 62 stops the generation of
any output signal. The input selector 62 is further supplied with a signal
from the input terminal 66 for control. This input terminal 66 is supplied
with an output signal from the time-adjusting switch 36. This output
signal is of the binary type, that is, has a level of 1 or 0 according as
the time-adjusting switch 36 is thrown to the stop side, or the start
side. When the time-adjusting switch 36 is thrown to the stop side,
namely, when an output signal from the terminal 66 has a level of 1, then
program information delivered from the bus line 61 to the input selector
62 is not transmitted to the first group of output bus lines 63 to 65, but
to the second group of output bus lines 67, 68. Said first group of bus
lines 63 to 65 is connected to the memory 69. The output bus line 63 is
connected to the memory 69 through an adder 70. A number 12 is added to
the information delivered from the bus line 63 in said adder 70. The
terminal 71 is supplied with a signal of 0 when the changeover switch 35
is thrown to the AM side and with a signal of 1 when said switch 35 is
thrown to the PM side. Only when the terminal 71 is supplied with a signal
of 1, the above-mentioned number "12" is added to the information supplied
from the input selector 62 to the bus line 63.
Where the selected ones of the pushbutton switches SW.sub.1 to SW.sub.13 on
the panel 32 which denote the hour, minute and channel number being preset
are depressed in the order mentioned with the program switch 34 thrown to
the program side, then the items of information representing both time and
control data are transmitted through the encoder 51, bus line 61, input
selector 62, and a group of output bus lines 63 to 65 to be stored in a
means for storing data such as the memory 69. The input selector 62 is
provided with a distribution circuit for detecting the items of
information delivered from the input bus line 61 and separating or
allotting said items of information to the corresponding output bus lines
63, 64, 65 in the order in which they are received. Thus, the output bus
line 63 is supplied with information on the hour, the output bus line 64
with information on the minute, and the output bus line 65 with
information on the channel number. A set of information comprising time
data from lines 63 and 64 and control data from line 65 is stored in one
of the addresses of the memory 69 consists of fourteen bits as illustrated
in, for example, FIG. 5. The first bit denotes information on the step bar
indicated by the referential numeral 41 in FIG. 3. The 2nd to 6th bits
represent information on the hour, the 7th to 10th bits information on the
minute, and the 11th to 14th bits information on the channel number. When
the terminal 66 receives a signal of 1, namely, when the time-adjusting
switch 36 is thrown to the "stop" side, then the input selector 62
supplies a means for generating a time signal such as clock device 72
(hereinafter referred to as a timer) with only the items of information on
the hour and minute included in those delivered from the input bus line 61
through the corresponding bus lines 67, 68. The timer 72 is set upon
receipt of the time data transmitted from the input bus line 61. The
operation of the input selector 62 is later detailed.
The timer 72 has its input terminal 73 supplied with standard clock pulses
obtained from, for example, a 50 Hz A.C. input signal, and generates
signals denoting the hour and minute by dividing the frequency of said
clock pulses. Namely, the timer 72 comprises four cascade connected
frequency dividers 72-1 to 72-4 which produce the output waves whose
frequencies correspond to one part of 3000, one-tenth, one-sixth and one
part of 24 of the original input pulse frequency respectively. These
frequency dividers 72-1 to 72-4 give forth output signals in units of 1
minute, 10 minutes, 1 hour and 1 day (or 24 hours) respectively. Time
information furnished by the timer 72 is transmitted to a time comparator
75 as one of two sets of time information items being compared by said
comparator 75. The other set of time information items being compared by
said comparator 75 are constituted by time information items previously
stored in the memory 69 and now read out therefrom through an output bus
line 76. When two sets of time information items coincide as the result of
comparison, then the time comparator 75 sends forth, for example, a signal
of 1 to the switching gate 59. When the coincidence signal of 1 is
delivered to the switching gate 59, the time information read out from the
memory 69 is transmitted through the switching gate 59 to the decoder 52
in place of the time information supplied from the output bus line 58.
The input terminal 78 is supplied with pulse signals sent forth from the
step switch 37. These pulse signals are counted by an address counter 79,
which comprises four cascade connected flip-flop circuits and is connected
to the memory 69 by a bus line 80 consisting of four signal lines so as to
designate the required address of the memory 69, for example, by a 4-bit
digital code. The memory 69 has, for example, sixteen addresses, some of
which are shown in FIG. 3. Each address is stored with one set of items of
receiving program information associated with a television program. The
memory 69 normally has its addresses designated by an address counter 79.
Where, however, a bus line 82 and an address designating
signal-interposing circuit 83 are operated, then said address designation
is preferentially carried out by an address register 81. The address
designating signal-interposing circuit 83 is connected to a control line
84 extending from the input selector 62. While said control line 84 is
supplied with a 1 signal, the address register 81 is prevented from
interposing an address-designating signal. The input selector 62 is so
arranged that where any of the channel-selecting pushbutton switches on
the panel 32 is depressed with the program switch 34 thrown to the program
side, then said input selector 62 gives forth a writeinstructing pulse,
which in turn is delivered to the control line 84. Where a given
television program is to be preset, it is advised first to depress the
step switch 37 so as to designate the address in which information on said
program is to be stored, and depress the selected pushbutton switches on
the panel 32, repeatedly if necessary, which denote the required items of
program information, namely, the hour and minute at which the user desires
to begin to listen in to said television program and the designated number
of the channel through which said program is broadcast, in the order of
the above-mentioned three items of information. This process enables the
items of information of a television program being preset to be written in
that address of the memory 69 which is designated by the address counter
79. The presetting of the succeeding television program can be effected by
depressing the step switch 37 to advance the addresses of the memory 69 by
one unit address, followed by the same operation of the pushbutton
switches on the panel 32 as in the preceding case. The same procedure
enables the items of information of any other television program to be
written in the memory 69.
Where the pushbutton switch 33 marked OFF on the panel 32 is depressed
immediately after depressing the selected switches of the twelve
pushbutton switches one to twelve for presetting the hour and minute at
which the user intends to cut off the television receiver in place of
presetting a channel number, then the television receiver is rendered
in-operative when the preset time arrives.
The memory 69 is so arranged that when a write-instructing signal is
supplied to the control line 84, then the address of said memory 69
designated by the address counter 79 is stored with program information as
previously described, but in other cases, the program information stored
in the address designated by the addr | | |
