A comparator circuit including a reference-voltage generating unit for generating a variable reference voltage, and a comparator having a first input terminal to which an input signal is supplied and a second input terminal to which the variable reference voltage from the reference-voltage generating unit is supplied. The comparator circuit also includes additional-voltage generating unit for generating an additional voltage that varies in proportion to the variable reference voltage, and a switching unit that is connected to the additional-voltage generating unit and activated or deactivated in response to an output of the comparator. When the switching unit is deactivated, the input signal is supplied to the first input terminal of the comparator and the variable reference voltage from the reference-voltage generating unit is supplied to the second input terminal of the comparator. When the switching unit is activated, the additional voltage from the additional-voltage generating unit is added to the input signal, and the sum of the input signal and the additional voltage is supplied to the first input terminal of the comparator so that an interpretation processing of the comparator is performed with a variable hysteresis characteristic corresponding to the additional voltage that varies in proportion to the variable reference voltage.

An apparatus may be connected to the temperature probe by means of a cable, and houses the display device, the electronic circuit, the voltage source, and the switches. The electronic circuit comprises a voltage multiplier, a control circuit, a supply circuit for supplying a highly constant voltage, a bridge circuit comprising four highly constant resistances, and a thermistor as temperature sensor, a voltage divider circuit for adapting the voltage generated by the bridge circuit, and an integrated circuit providing a 3-1/2 position digital-voltmeter which directly operates the display device.

An analog to digital converter is fabricated using CMOS construction and uses a successive approximation register to develop the bits in a digital word. A digital to analog converter converts the digital word to analog voltages which are compared with the analog input. The comparator is coupled to the register so as to determine its word bit sequence. The digital words most significant bit is set first in accordance with whether the analog input is greater or less than half of the reference voltage. Then the next most significant bit is evaluated and this process is continued until the least significant bit is evaluated at which time the conversion is complete. In the CMOS circuit, a switched comparator is employed and it draws a capacitor charging current in its operation. Accordingly, it is useful to buffer the comparator input. Two buffers are employed, one p-type and one n-type. They have common inputs and outputs that are selected as a function of the most significant bit in the digital word. The selected output is coupled to the comparator so that the comparator does not load the analog signal input.

An input circuit which converts a contact signal into a voltage signal is provided. The voltage signal output corresponding to the ON/OFF operation of the contact differs in polarity with methods of connection of the contact to a current limiting resistor at one end thereof between a power source and ground. To handle this, noncoincidence is detected between the output voltage signal level and the voltage level at the other end of the current limiting resistor connected to a voltage signal output terminal. An output signal is then generated, thereby obtaining a voltage signal output which undergoes the same polarity change corresponding to the ON and OFF states of the contact, irrespective of the method of connection of the contact used. When a large number of input circuits are used, a noncoincidence detecting circuit is provided for each of groups into which the input circuits are divided, and the voltage output signals the input circuits of each group are selectively applied to the noncoincidence detecting circuit. This permits the reduction of the scale of the entire circuit and the number of parts used.

A processing circuit for use with DC-voltage-output type sensors comprising: a preamplifier; an automatic polarity-switching means coupled to the sensor and the preamplifier for switching the connection condition between a non-polarity-inversion condition and a polarity-inversion condition; and a controlling-measuring means for controlling the automatic polarity-switching means in carrying out the switching alternately between the non-polarity-inversion condition and the polarity-inversion condition, and for measuring the difference between the output of the preamplifier under the non-polarity-inversion condition and the output of the preamplifier under the polarity-inversion condition, thereby cancelling the effects of the input offset voltage of the preamplifier and the offset voltage of the preamplifier and the offset voltage generated by the input bias current and the resistance of said DC-voltage-output type sensor.