The present invention discloses a data processing system having a program structure and execution mode where an actual argument is bound to a formal argument of a function to be called by storing a pair of a variable name as the formal argument and a variable as the actual argument into a First-In-Last-Out type stack memory which is an environment list, the function called executes processings using a latest bind value of said environment list when referring to variable values, when a value of such function is obtained, the function value is returned by deleting the formal argument variable of the function from the environment list. The system includes an associative buffer memory provided externally to the stack memory, where at least the variable name and location data of variable on the environment list are stored in the associative buffer memory, and thereby the access time for referring to variables stored in the stack memory can be curtailed.

A design is disclosed for a cellular computer consisting of many processors, of two kinds, connected in the form of a tree. The computer is intended for the highly parallel execution of programs written in an applicative programming language. The program is stored in the leaf cells of the tree. The computer uses the syntactic structure of the program to guide the embedding of a network of "syntactic nodes" in the tree of machine cells, and execution of the program is accomplished through operations performed by the embedded network of nodes. This computer can execute many user programs simultaneously, it can take advantage of all the parallelism expressed in each user program (storage space permitting), and it can perform in parallel many operations below the level expressed in the user programs.

Source code is compiled using a multi-stage compiler that includes a tokenizer, a type checker, and a composer. The tokenizer segments source code into a sequence of tagged segments. The source code includes at least one instruction that composes a first abstraction and a second abstraction with a selected composition operator. The parser builds a tree using the sequence of tagged segments. The type checker performs a first pass of the tree to determine whether abstractions on the tree are well typed. The composer reduces the at least one instruction composing the first and the second abstractions on the tree to a third abstraction. The composer substitutes the first and the second abstractions on the tree with the third abstraction, wherein the type checker performs a second pass of the tree to determine whether the third abstraction is well typed.

This disclosure relates to a reduction processor for the evaluation of one or more functions which are stored in memory in the form of a series of nodes of a treelike graph where the nodes implement a variable-free applicative language. The respective function operators are reduced through a progressive series of transformations or substitutions until a result is obtained. During the reduction process, the processor transfers nodes to and from memory and performs various operations as required on those nodes. The processor can also create new nodes in memory and delete unused ones.

A microprocessor with a two bus structure and modulo addressing hardware which converts any section of main memory into an apparent circular address space for use as a five-fold data register. The modulo addressing hardware has a capability for circularly loading data into a sequential order or accessing data repeatedly for the evaluation of recursive algorithms. Thus, the modulo addressing hardware is useful in the rapid processing of such recursive software algorithms and in the solution of various mathematical series. More generally, it is useful for the rapid access of any data in memory. The described microprocessor uses the modulo addressing hardware concurrently with the execution of data manipulation instructions. A 64 bit wide instruction allows control of both modulo addressing hardware and the microprocessor CPU in a single micro instruction.