A current mode operational rectifier has an output terminal connectable as a DC current source of a predetermined polarity, and comprises a high gain amplifier having an inverting input terminal for receiving an input signal current from an AC current source and two alternative transmission paths for providing full wave rectification. The first transmission path includes a first transistor having its base connected to the output terminal of the amplifier and its emitter and collector connected between the output terminal of the rectifier and the input terminal of the amplifier. The first transmission path conducts DC current to the output from the input terminal of the amplifier at an instantaneous level substantially equal to the instantaneous level of the input signal when the input signal is of a first polarity. The second transmission path includes matched second and third transistors. The second transistor has its emitter and collector connected between the input and output terminals of the amplifier while the emitter and collector of the third transistor are connected between the output terminal of the amplifier and the output terminal of the rectifier. The second transistor conducts the input signal from the input terminal of the amplifer to the output terminal of the amplifer and the third transistor simultaneously conducts current to the output from the output of the amplifier at an instantaneous level substantially equal to the instantaneous level of the input signal when the input signal is of a polarity opposite that of the first polarity.
An RMS converter has first and second transistors (40a and 42a) providing a signal representing double the log of the input voltage, a third transistor (40b), matched with the first (40a), providing a signal representative of the log of the output voltage and a fourth transistor (42b), matched with the second (42a). providing a signal representative of the anti-log of the ratio of those signals; the transistors in each matched pair are repetitively interchanged functionally thereby reducing errors caused by slight differences in the transistor operating characteristics.
A rectifier is arranged to enable predetermined profiles for charging and discharging a capacitor to be satisfied over a wide dynamic range of input signals. The feedback loop is provided in which a charging resistance, a charging capacitor, a discharge resistor and a rectifying element are provided as separate items.
An improved bias generator provides a bias voltage output which varies with temperature in accordance with a predetermined voltage-temperature function.
An improved current mode operational rectifier having loop transmissions through both feedback paths of an operational amplifier stage which limit at unity gain. An improved bias generator which can be used to bias the operational rectifier is also disclosed.
An amplifier circuit having a pre-amplifier responsive to a program input signal, a filter circuit, and an absolute value circuit. The pre-amplifier provides automated balancing between the high frequency channel signals and the mid range channel signals to provide a compensated signal. The filter circuit is coupled to receive and automatically filter the compensated signal to provide an output signal and a modified compensated signal. The filter circuit has an adjustable bandwidth that is automatically adjusted in response to the control signal for automatically reducing the bandwidth of the filter circuit in response to lower values of the control signal to obtain the output signal. The filter circuit uses a voltage controlled amplifier or a photo cell in combination with an integrator. An absolute value circuit senses the modified compensated signal and provides a control signal proportional to the average peak value of the amplitude of the modified compensated signal.
