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Control system for an image detector
   
Document Number
US Patent 4101763
Issued Date
July 18, 1978
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Inventors
Flint; John R. (Barrington, IL)
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Abstract
A control system is described for converting the output current of a photosensitive image detector to an image location voltage of predetermined first and second levels in response to the image detector receiving high and low levels of light, respectively. The image location voltage is developed by passing the output current from the image detector, as well as a selectively variable control current, through an impedance such that increases and decreases in the amplitude of the control current result in corresponding decreases and increases, respectively, in the level of the image location voltage. To change the level of the image location voltage, the amplitude of the control current is caused to be proportional to the charge on a charge storing element and the latter is rapidly and alternately charged and discharged within predetermined limits to vary the amplitude of the control current, and thus the level of the image location voltage. By so varying the charge on the charge storing element, the image location voltage is caused to have an average value which is substantially equal to the first predetermined level when the image detector receives a relatively high level of light, and an average value which is substantially equal to the second predetermined level when the image detector receives a relatively low level of light.
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Control system for an image detector - US Patent 4101763 Drawing
Drawing from US Patent 4101763
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Number of Claims:
14
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Owner
Bell & Howell Company (Chicago, IL)
Published
July 18, 1978
Application Number
05/803,019
Filed
June 3, 1977
US Classification
250/214R   250/214C 327/205 327/514
Int'l Classification
G06M   7/00   (20060101)   G06M   7/06   (20060101)   H03G   3/20   (20060101)   H01J   40/00   (20060101)   G06K   7/10   (20060101)   H01J   40/14   (20060101)  
Examiner
Assistant Examiner
USPTO Field of Search
250/214R   250/214C  
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5304864 - Analog maximum/minimum selector circuit - Owned by Rockwell International Corporation (Seal Beach, CA)

An electronic circuit is provided for comparing a plurality of input signals and indicating and/or selecting the maximum or minimum signal from the input set. The plurality of input signals are amplified, logarithmically compressed, and buffered by a corresponding plurality of simple transistor circuits, which are substantially identical. The buffered input signals are provided to a high resolution multiple input comparator circuit. The comparator circuit comprises a two-stage emitter-coupled comparator and a single stage inverter-amplifier. In the first comparator stage, strong input signals share the bias current but all the weak signals drop out. The inverter-amplifier stage amplifies the differences between the strong signals that survive the first comparison stage. The second stage comparator determines the strongest of the few remaining signals. With fewer competing signals, and enlarged voltage differences between them, the second stage comparator can determine the strongest of the original input signals with a high degree of resolution.

Claims
Description
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