A memory circuit with protection circuit having particular application to MOS-IC memories is disclosed. The protection circuit prevents the memory from being damaged by an undesirable turn-on or turn-off sequence of main and substrate voltage supplies or by an abnormal substrate voltage.
An IC card reader/writer has a short-circuit detector for determining, when an IC card is inserted in the reader/writer, whether or not any of connecting terminals for feeding a current to the IC card is short-circuited, and producing a resultant signal representative of the result of determination. A control is responsive to the resultant signal for performing, when the resultant signal does not indicate short-circuit, control such that the current is fed to the IC card via the connecting terminals. A reference voltage generator generates a reference voltage, while the short-circuit detector determines whether any of the connecting terminals is short-circuited or not by using the generated reference voltage.
When a memory cassette having semiconductor memory is attached to or detached from a connector mounted on an adapter, the supply of power to the memory cassette through the adapter is switched on or off and an interface signal between the memory cassette and the adapter is rendered active or inactive in response to connection or disconnection between the memory cassette and the adapter. The stored content of the semiconductor memory can be protected against destruction which would otherwise result from application of a power supply voltage upon connection or disconnection between the memory cassette and the adapter.
A cash register power supply system is disclosed which isolates the work system from the battery charging system. A battery charger charges one of two batteries while the other battery drives a cash register. A timer and switching mechanism switch the batteries between charge and work systems at regular time intervals. Thus, the work system is isolated from the house current and the possibility of power surges which can affect the cash register memory.
Memory storage apparatus include a non-volatile memory for storing data and a power management unit configured to sense a level of an external power supply and to predict a loss of the external power supply. A power-polling time control circuit is configured to control a time when a voltage level sourced from the external power supply is reduced below a predetermined level after loss of the external power supply. A control logic controls read and/or write operations of the non-volatile memory responsive to a prediction of loss of the external power supply from the power management unit.
A memory expansion board capable of holding up to 16 Mbytes of memory devices, using primarily 1 Mbit chips, in 2 Mbyte module increments, on a single IBM PC/AT compatible size board. The circuit board is so designed that when the memory expansion board is populated by modules and placed in a computer system it does not interfere with any of the other expansion slots within the computer system, all of the expansion slots being normally spaced apart. The memory expansion board also includes a means of protecting the memory expansion board and modules from damage due to misalignment when inserting the board and/or modules. When certain of the modules are inserted rotated 180 degrees the circuit board cannot be properly installed in the system board because of physical interference. Lastly, the memory expansion board includes a means for providing reduced length addressing memory lines to memory devices appearing on opposite sides of a circuit board.