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Memory circuit with protection circuit
   
Document Number
US Patent 4109161
Issued Date
August 22, 1978
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Inventors
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Abstract
A memory circuit with protection circuit having particular application to MOS-IC memories is disclosed. The protection circuit prevents the memory from being damaged by an undesirable turn-on or turn-off sequence of main and substrate voltage supplies or by an abnormal substrate voltage.
Drawing
Memory circuit with protection circuit - US Patent 4109161 Drawing
Drawing from US Patent 4109161
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Number of Claims:
3
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Published
August 22, 1978
Application Number
05/766,815
Filed
February 8, 1977
US Classification
307/87   361/92
Int'l Classification
G05F   3/08   (20060101)   G05F   3/20   (20060101)   G05F   1/577   (20060101)   G05F   1/10   (20060101)   G11C   11/407   (20060101)   G11C   5/14   (20060101)   G11C   11/4074   (20060101)   H01L   27/02   (20060101)  
Priority Data
Feb 09, 1976 [JP] 51-13055
USPTO Field of Search
307/131   307/87   307/43   361/92   361/88   340/172.5  
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Description
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