An overload relay is provided which monitors current flow in a circuit and triggers an electromagnetic interrupter to open the circuit upon detection of an overcurrent condition. A train of pulses is generated and received by the electromagnetic interrupter for maintaining the circuit closed. The pulse train is terminated upon detection of an overcurrent condition.

A chopping transistor connected across a d-c power supply, in series with a load such as a motor, has its base connected to an output of an oscillator generating a train of voltage pulses V.sub.1 by which that transistor is alternately turned on and off. A threshold sensor emits a series of monitoring pulses V.sub.2 of the same polarity as the conduction-establishing control pulses V.sub.1 when the collector/emitter voltage of the transistor surpasses a certain limit; the joint appearance of signals V.sub.1 and V.sub.2 at respective inputs of an AND gate gives rise to an off-normal signal V.sub.3 which, if of extended duration, passes a delay circuit to act as an alarm signal V.sub.4. A memory tripped by that alarm signal emits a permanent disconnect signal V.sub.5 which either blocks the oscillator or fires a thyristor in shunt with the transistor whereby a fuse in series therewith is blown. The transistor may be one of four such transistors inserted in respective arms of a bridge, with two oscillators each driving a pair of these transistors and a common fuse in series with both pairs.

When a voltage (V) of a D.C. power source having an internal resistance (5a) exceeds an "exciting voltage" (FIG. 2), transistors (21, 28 and 33) turn ON, and a transistor (30) turns OFF, and then a tripping winding 16 is excited to close a circuit breaker; on the other hand when the voltage (V) is lowered under a "tripping voltage", the transistor (33) turns OFF and the transistor (30) turns ON, and thereby a load resistor (31) which is less than a resistance 34 of the tripping winding 16 is connected to the D.C. power source; consequently, the voltage V is further lowered by the internal resistance (5a), and a voltage difference is produced between the exciting voltage and the tripping voltage, thus making a "hysteresis characteristic" between the exciting voltage and the tripping voltage.

A transistor fault indicator circuit monitors the conduction state of a transistor and compares that state to a commanded state. Differences in states are treated as faults and actuate an alarm or shut down the system including the transistor. In systems in which the transistor may be operated in a continuous conduction mode for long time periods, a control circuit is provided to periodically short circuit the base-emitter bias of the transistor to force a momentary period of nonconduction during which time the proper operation of the transistor can be verified.

A battery monitoring circuit for an electronic wristwatch that avoids an inadvertent indication of battery failure when a sudden, but temporary, load is placed upon the battery is provided. The invention is characterized by a monitoring circuit that produces an indication signal of impending failure of the battery in response to a detection signal being applied thereto. The detection signal is produced by a battery detection circuit when the voltage of the battery falls below a predetermined level. An inhibit circuit is coupled intermediate the voltage detection circuit and the monitoring circuit and detects when a temporary load is placed upon the battery and, in response thereto, inhibits the detection signal from being applied to the monitoring circuit to thereby prevent an indication signal, representative of imminent battery failure, from being produced as a result of an additional load being temporarily placed upon the battery.