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Hierarchially arranged memory system for a data processing arrangement having virtual addressing
   
Document Number
US Patent 4130870
Issued Date
December 19, 1978
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Abstract
A hierarchially arranged memory system is described for a data processing system having virtual addressing. A three-level working memory is provided, along with an auxiliary memory, in a data processing system containing a secondary buffer between the main memory and a rapid buffer memory. Whereas the main memory contains all actual storage areas, i.e. the memory pages of the inactive processes which were required for the processing period just passed, the actual storage area for the successor process, independent from the operating system, is set independently by its own microprocessor.
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Hierarchially arranged memory system for a data processing arrangement having virtual addressing - US Patent 4130870 Drawing
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Number of Claims:
10
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Owner
Siemens Aktiengesellschaft (Berlin & Munich,DE1)
Published
December 19, 1978
Application Number
05/832,237
Filed
September 12, 1977
US Classification
711/219  
Int'l Classification
G06F   12/10   (20060101)  
Priority Data
Sep 16, 1976 [DE] 2641722
USPTO Field of Search
364/2MSFile  
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