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Claims  |
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What is claimed is:
1. A method of recording pulse encoded information in the form of
successive plural-bit words on a record medium by a video signal recorder
of the type normally adapted to record video signals, such as composite
television signals, on said record medium and normally having a control
mechanism that is responsive to the synchronizing signals contained in
said video signals for controlling the recording operation thereof, said
method comprising the steps of supplying successive ones of said
plural-bit words, generating simulated horizontal and vertical
synchronizing signals synchronized to the frequencies of the horizontal
and vertical synchronizing signals normally included in said video
signals; time-compressing each of said plural-bit words by writing said
words into an addressable memory at a first rate and contemporaneously
reading said words out of said memory at a second, faster rate to insert
relatively short gaps between adjacent read-out words and to insert a
relatively large gap between adjacent fields of words, combining the
simulated horizontal and vertical synchronizing signals with said plural
bit words without loss of any of such words by inserting a simulated
horizontal synchronizing signal into each gap between adjacent words and
by inserting a simulated vertical synchronizing signal into the large gap
between adjacent fields to form a substantially continuous pulse signal;
and recording fields of the substantially continuous pulse signal formed
of said combined synchronizing signals and plural-bit words in successive
tracks on said record medium, a field of words being recorded during the
time normally required for recording a video field, so as to record all of
said supplied plural-bit words.
2. The method of claim 1 wherein said step of recording comprises recording
said substantially continuous pulse signal in said tracks in serial form.
3. The method of claim 2 wherein said simulated vertical synchronizing
signals are of the same frequency as the vertical synchronizing signals
normally included in said video signals.
4. The method of claim 3 wherein said simulated horizontal synchronizing
signals are of a frequency that is a multiple of the frequency of the
horizontal synchronizing signals normally included in said video signals.
5. The method of claim 1 wherein said words are written into addressable
locations of said memory serially by bit, and contemporaneously read out
of said addressable locations serially by bit at a time delayed with
respect to the writing of said words so as to form said relatively large
gap between adjacent fields of read-out words.
6. The method of claim 1 wherein each of said plural-bit words represents a
sample of audio information; and said step of supplying said plural-bit
words comprises supplying analog audio signals, and converting said analog
signals to digital form.
7. The method of claim 7 wherein said step of converting said analog audio
signals to digital form comprises periodically sampling said analog audio
signal, converting each sample to a plural-bit word, and serializing said
plural-bit words into a train of bits having said first rate.
8. A method of reproducing substantially continuous plural-bit words in
succession from a record medium by video signal playback apparatus of the
type normally adapted to play back video signals, such as composite
television signals, from successive tracks in said record medium and
normally having a control mechanism that is responsive to the
synchronizing signals contained in the played back video signals for
controlling the playback operation, the plural-bit data words being
recorded with simulated horizontal synchronizing signals interleaved
between adjacent words and with simulated vertical synchronizing signals
interleaved between adjacent fields of words, the simulated horizontal and
vertical synchronizing signals being synchronized to the frequencies of
the horizontal and vertical synchronizing signals normally included in
said video signals, said method comprising the steps of reproducing a
field of said plural-bit words and interleaved simulated horizontal and
vertical synchronizing signals from said record medium in the time
normally required to reproduce a video field; separating said reproduced
simulated horizontal and vertical synchronizing signals from said
plural-bit words to form relatively short gaps between adjacent words and
a relatively large gap between adjacent fields of words; and recovering
the data represented by said reproduced plural-bit words by time-expanding
said words, including the steps of writing each of said words into an
addressable memory at a first rate and contemporaneously reading said
words out of said memory at a second, slower rate to fill in said short
and large gaps, thereby producing substantially continuous, successive
read-out plural-bit words.
9. The method of claim 8 wherein said step of reproducing comprises
serially reproducing said plural bits and said simulated synchronizing
signals to derive a substantially continuous bit train having said first
rate.
10. The method of claim 9 wherein said plural-bit words represent audio
information, and said step of recovering the data represented by said
words comprises converting each word into a corresponding analog signal
level.
11. The method of claim 9 wherein said step of time-expanding comprises
generating write clock pulses synchronized to said simulated horizontal
synchronizing signals separated from said reproduced signals; writing said
serially reproduced bits into addressable locations of a memory storage at
a write-in rate determined by said generated write clock pulses;
generating read clock pulses at a slower repetition rate than that of said
write clock pulses including the steps of comparing the phase of said read
clock pulses with the phase of said write clock pulses, and varying the
phase of said read clock pulses to be equal to that of said write clock
pulses only if the phase differential therebetween changes at a rate
slower than a predetermined threshold; and reading said encoded data
pulses out of said addressable locations of said memory storage at the
read clock pulse rate.
12. The method of claim 11 wherein said simulated vertical synchronizing
signals are of the same frequency as the vertical synchronizing signals
normally included in said video signals, and said simulated horizontal
synchronizing signals are of a frequency that is a multiple of the
frequency of the horizontal synchronizing signals normally included in
said video signals.
13. A system for recording pulse data on a record medium, comprising:
means for supplying said pulse data in the form of successive, serialized
plural-bit words;
synchronizing signal generator means for generating simulated video
horizontal and vertical synchronizing pulses;
time-compression means for receiving each of said serialized plural-bit
words, in succession, said time-compression means including memory means
having addressable locations into which said plural-bit words are written
at a first rate and from which said words are contemporaneously read at a
second, faster rate for compressing the time domain of said plural-bit
words to insert relatively small gaps between adjacent read-out words;
means for delaying the contemporaneous reading out of said plural-bit words
with respect to the writing in thereof so as to insert a relatively large
gap between adjacent fields of said read-out words;
mixing means for mixing said simulated synchronizing pulses with said
read-out words without loss of any of said words such that said simulated
horizontal synchronizing pulses are interleaved into said relatively small
gaps between adjacent words and said simulated vertical synchronizing
pulses are interleaved into said relatively large gaps between adjacent
fields of words; and
means for recording each of said plural-bit words and interleaved
synchronizing pulses serially in successive record tracks on said record
medium.
14. The system of claim 13 further comprising clock pulse generating means
for generating write-in clock pulses at said first rate, and read-out
clock pulses at said second, faster rate for the writing-in and
reading-out, respectively, of said data words.
15. The system of claim 14 wherein said clock pulse generating means
comprises a source of timing pulses having said second rate for producing
said read-out clock pulses, controllable oscillator means for producing
said write-in clock pulses; and control means for controlling said
oscillator means with said read-out clock pulses so as to synchronize said
write-in and read-out clock pulses at a fixed ratio with respect to each
other.
16. The system of claim 14 wherein said means for supplying said plural-bit
words comprises a source of audio analog signals; analog-to-digital
converting means for sampling said analog signals and for converting each
analog signal sample into a corresponding word formed of encoded bits; and
means for supplying said bits serially to said memory means.
17. The system of claim 16 wherein said time-compression means further
includes gate signal generator means for generating a write-in gate signal
to enable said serially supplied bits to be written into said memory means
and for generating a read-out gate signal to enable said bits to be read
out serially of said memory means during selected intervals.
18. The system of claim 7 wherein said gate signal generator means
comprises counter means for receiving and counting said simulated
horizontal synchronizing signals and for generating an output signal after
a predetermined number of simulated horizontal synchronizing signals
corresponding to a field of plural-bit words have been counted; detecting
means for detecting the termination of a simulated vertical synchronizing
signal; and means for commencing said read-out gate signal when the
termination of said simulated vertical synchronizing signal is detected
and for terminating said read-out gate signal when said output signal is
generated.
19. The system of claim 18, further comprising actuable switch means for
initiating a recording operation; and wherein said gate signal generator
means further comprises means responsive to said output signal generated
after said switch means first is actuated for producing said write-in gate
signal.
20. A system for reproducing pulse data which had been recorded in
successive record tracks on a record medium, said recorded pulse data
being formed of successive plural-bit words with adjacent words separated
from each other by simulated horizontal synchronizing signals, said words
forming a field with successive fields separated from each other by
simulated vertical synchronizing signals, said system comprising:
signal playback means for reproducing said plural-bit words serially by bit
and said simulated horizontal and vertical synchronizing signals in a
substantially continuous composite signal;
synchronizing signal separator means for receiving said composite signal
and for separating said simulated horizontal and vertical synchronizing
signals therefrom to form relatively short gaps between adjacent words and
a relatively large gap between adjacent field of words;
data recovery means for receiving said reproduced plural-bit words and for
recovering the data represented thereby, said data recovery means
including time domain expanding means comprising memory means having
addressable locations into which said reproduced plural-bit words are
written at a first rate and from which said words are contemporaneously
read at a second, slower rate for expanding the time domain of said
plural-bit words to fill in said short and large gaps and form
substantially continuous, successive serial by bit words; and
timing means coupled to said synchronizing signal separator means for
controlling the writing in and reading out of plural-bit words in said
memory means in response to said separated simulated horizontal and
vertical synchronizing signals.
21. The system of claim 20 wherein said timing means comprises a first
controllable oscillator for generating first timing pulses at said first
rate which is a multiple of the frequency of said simulated horizontal
synchronizing signals; first phase control means for controlling the phase
of said first timing pulses to be equal to the phase of said separated
horizontal synchronizing signals, whereby if a time-base error is present
in the reproduced composite signal, it is imparted to said first timing
pulses; a second controllable oscillator for generating second timing
pulses at said second rate; second phase control means for controlling the
phase of said second timing pulses to be equal to the phase of said first
timing pulses only if the phase differential therebetween varies at a rate
which is less than a predetermined rate; and means for applying said first
and second timing pulses to said memory means as write-in and read-out
timing pulses, respectively; whereby time-base errors that are greater
than said predetermined rate are corrected by writing said plural-bit
words into said memory means in response to said phase-controlled first
timing pulses and reading said data words out of said temporary storage
means in response to said second timing pulses, and time-base errors that
are less than said predetermined rate are not corrected.
22. The system of claim 20 wherein said timing means comprises counter
means for counting said separated simulated horizontal synchronizing
signals until a predetermined count corresponding to a field of plural-bit
words is obtained; detecting means for detecting each separated simulated
vertical synchronizing signals, and gate pulse generating means responsive
to the predetermined count of said counter means and to said detecting
means for generating a write-enabling gate pulse having an enabling
portion extending from the termination of a detected simulated vertical
synchronizing signal until said predetermined count is obtained and an
inhibiting portion extending from the time said predetermined count is
obtained until the termination of a detected simulated vertical
synchronizing signal; said enabling portion enabling said plural-bit words
to be written serially into said memory means.
23. The system of claim 22 wherein said timing means further comprises
actuable switch means for initiating a playback operation; means for
detecting the start of the first field of reproduced plural-bit words
following actuation of said switch means; and means for generating a
read-enabling signal at a time delayed from said detected start of the
first field, the read-enabling signal overlapping in time with said
write-enabling gate pulse to enable said plural-bit words to be written
into and then read out of said memory means contemporaneously.
24. The system of claim 20 wherein said recorded plural-bit words represent
samples of audio information, and said data recovery means further
includes digital-to-analog converting means for converting the
substantially continuous, successive serial by bit words into analog audio
signals.
25. The system of claim 24 wherein said digital-to-analog converting means
comprises a serial-to-parallel converter for converting said serial bits
into parallel data words; means for producing an analog signal level
corresponding to each data word; and filter means for filtering
successively produced analog signal levels. |
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Claims |
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Description |
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BACKGROUND OF THE INVENTION
This invention relates to the recording and/or reproduction of pulse
encoded information and, more particularly, to a method of and apparatus
for using a video signal recorder/reproducer for this purpose.
A magnetic video recorder, such as a video tape recorder (VTR) exhibits a
sufficiently wide recording bandwidth such that it can be used to record
audio signals with extremely high fidelity. A conventional type of VTR,
when used to record an NTSC color video signal, records such a signal in
parallel slant tracks, each track having a video field recorded therein.
In view of the relatively low frequencies of an audio signal, there is a
far greater signal storage capacity in each slant track than is needed for
the audio signal. Accordingly, it is not advantageous to record an analog
audio signal in place of a video signal in the slant tracks of a VTR.
If an audio signal is encoded into a digital signal, such as a PCM data
signal, the resultant pulse signals can be processed without a
concomittent loss in signal information. That is, the pulse signals can be
transmitted or recorded with great accuracy. However, in order to exhibit
the necessary high bandwidth for magnetically recording such pulse
signals, suitable magnetic recording equipment heretofore has been very
expensive. A VTR of the type now available for home video recording use is
far less expensive than professional-type high bandwidth magnetic
recording equipment, yet such a VTR offers a satisfactory bandwidth
characteristic to permit the magnetic recording of a pulse encoded audio
signal.
In order to use a VTR advantageously for recording pulse encoded data in
general, or pulse encoded audio information in particular, it is necessary
to record control signals which represent, or are similar to, the normal
horizontal and vertical synchronizing signals which are included in video
signals. This is because the control mechanism of the VTR relies upon
these synchronizing signals for the purpose of controlling the movement
(e.g., rotation) of the recording/playback head or heads as well as the
movement of the recording tape in close synchronism. Accordingly,
simulated horizontal and vertical synchronizing signals should be
generated and combined with the pulse data so as to supply the VTR with a
continuous composite signal for recording which, in some important
aspects, is analogous to the video signals normally recorded by such VTR.
Furthermore, these simulated synchronizing signals should not interfere
with the pulse data. That is, to avoid loss of useful pulse data
information, such pulse data should not be replaced by the simulated
synchronizing signals.
In accordance with one feature of the apparatus described below, the time
domain of the pulse data is compressed for recording, thus leaving "gaps"
in the pulse signal into which the desired simulated synchronizing signals
can be inserted. During playback, the synchronizing signals are removed
and the "gaps" are eliminated by expanding the time domain of the pulse
data.
OBJECTS OF THE INVENTION
Therefore, it is one object of the present invention to provide a method of
and apparatus for using a video signal recorder for recording pulse
encoded information on a record medium.
Another object of this invention is to provide a method of and apparatus
for adding simulated horizontal and vertical synchronizing signals to
pulse encoded data so as to form a composite signal of the type which can
be recorded and/or reproduced by a video signal recorder.
A further object of this invention is to provide a method of and apparatus
for using video signal reproducing apparatus for recovering data which had
been recorded as pulse signals on a record medium in a particular signal
format.
An additional object of this invention is to provide a method of and
apparatus for using a video signal recorder/reproducer for
recording/reproducing pulse encoded audio signals on a record medium
without modifying the video signal recorder/reproducer per se.
Various other objects, advantages and features of the present invention
will become readily apparent from the ensuing detailed description, and
the novel features will be particularly pointed out in the appended
claims.
SUMMARY OF THE INVENTION
In accordance with this invention, a method of and apparatus for
controlling a video signal recorder/reproducer of the type normally
adapted to record and/or reproduce video signals are provided wherein the
video signal recorder/reproducer operates to record and/or reproduce pulse
encoded data on a record medium. For a recording operation, pulse encoded
data in the form of data words is supplied, and simulated horizontal and
vertical synchronizing signals, which are similar to the horizontal and
vertical synchronizing signals normally included in a video signal, are
generated and combined with the data words so as to form a substantially
continuous composite signal. This composite signal is supplied to the
video signal recorder for recording in successive tracks on the record
medium. In a signal reproduction operation, the recorded composite signal
is reproduced and the reproduced simulated horizontal and vertical
synchronizing signals are separated therefrom. These separated
synchronizing signals are used for the control of data recovery, whereby
the original information is recovered from the reproduced data words.
In accordance with one advantageous feature of this invention, the pulse
encoded information is representative of analog audio signals. As another
advantageous feature of this invention, the simulated horizontal and
vertical synchronizing signals are combined with the data words in such
manner as not to destroy or deleteriously affect any of the data
information.
BRIEF DESCRIPTION OF THE DRAWINGS
The following detailed description, given by way of example, will best be
understood in conjunction with the accompanying drawings wherein:
FIG. 1 is an overall system block diagram of the present invention;
FIGS. 2A-2C are waveform diagrams representing how the system of FIG. 1
operates;
FIG. 3 is a block diagram showing a portion of the system of FIG. 1 in
greater detail;
FIGS. 4A and 4B are block diagrams of the memory and memory control
apparatus shown in FIG. 3;
FIG. 5 is a partial logic, partial block diagram of one embodiment of the
clock pulse generator shown in FIG. 3;
FIG. 6 is a logic diagram of one embodiment of the start/stop signal
generator shown in FIG. 3;
FIGS. 7A-7K are waveform diagrams which are useful in explaining the
operation of the start/stop signal generator;
FIG. 8 is a logic diagram of the mode signal generator shown in FIG. 3; and
FIGS. 9A-9J are waveform diagrams which are useful in explaining the
operation of the mode signal generator.
DETAILED DESCRIPTION OF A PREFERRED EMBODIMENT
Overall System
Referring now to the drawings, and in particular to FIG. 1, there is
illustrated a block diagram of one embodiment of apparatus which can be
used in conjunction with a video signal recorder to record signals, and
particularly pulse signals, onto a record medium and to reproduce such
signals from the record medium. For the purpose of the present
description, the video signal recorder is assumed to be a video tape
recorder (VTR) 1 and the record medium is assumed to be magnetic tape.
However, it will be apparent that other types of recorders and recording
media can be used, such as an optical recorder, a magnetic sheet, disc, or
the like. As is known, VTR 1 is adapted for normal operation to record and
play back video signals. For this purpose, VTR 1 includes circuitry that
utilizes the synchronizing signals normally accompanying a video signal to
particularly control a recording and a playback operation. As one example,
VTR 1 is of the type having two rotary heads spaced 180.degree. apart that
scan successive slant tracks across magnetic tape, each such track having
one field of an NTSC signal recorded therein. Such a VTR has a bandwidth
that is sufficiently wide so as to be capable of recording pulse signals
in the slant tracks. Since, in the conventional VTR, each rotary head
records and reproduces a serial signal, these heads can be used to record
and reproduce pulse signals in serial form. While these pulse signals can,
of course, represent a wide variety of data, or information, the system
shown in FIG. 1 will be described for the application wherein analog audio
signals are represented by pulse signals. This can be achieved by sampling
audio signals, for example, left and right stereo signals, and suitably
encoding each sample, as by pulse code modulation (PCM) encoding.
In order to understand better the following description and appreciate the
improvements achieved by the system of FIG. 1, an explanation of preferred
parameters now is given. Practically, VTR 1 is capable of recording
1,400,000 bits per second (1.4M bit/sec.), thus having a pulse signal
recording rate corresponding to 1.4 MHz. If the audio signal is to be
enabled to undergo a dynamic range of 90dB for high fidelity recording, a
sampled signal should be encoded with 13 bits. Hence, if left and right
stereo signals are contemplated, then each digital word is comprised of 26
bits (13 bits per channel). Now, in a conventional VTR, it is convenient
for the frequency of the signal that is recorded to be related to the
horizontal synchronizing signal frequency f.sub.h so that the digital word
recording signal frequency f.sub.t =nf.sub.h, where n is an integer; but
##EQU1##
or ft should be less than 53.85 KHz. Also, each slant track has one field
of a video signal recorded therein, and each field is comprised of 262.5
horizontal line intervals. However, useful information, that is, pulse
encoded audio information, is not recorded during the vertical
synchronizing interval which, generally, is comprised of about twenty
horizontal line intervals (20H).
If it assumed that the maximum frequency in the audio signal to be recorded
is approximately 20 KHz, then the minimum sampling frequency f.sub.s
necessary to encode this audio signal is twice the maximum frequency, or
40 KHz. Therefore, the minimum digital word recording signal frequency
should be greater than the ratio between the number of horizontal line
intervals in a field and the number of useful horizontal line intervals in
that field, times the minimum sampling frequency, that is,
##EQU2##
or f.sub.t > 43.3 KHz. The following summary of the foregoing conditions
43.3 KHz<(f.sub.t =nf.sub.h)<53.85 KHz is satisfied by:
f.sub.t = 3f.sub.h = 3.times.15.75 KHz = 47.25 KHz.
Consistent with this expression, the sampling frequency f.sub.s may be
expressed as
##EQU3##
However, the sampling frequency f.sub.s should be related to the recording
signal frequency f.sub.t by an integral number. If f.sub.t /f.sub.s =
15/14, as an example, then f.sub.s = 44.1 KHz. Thus, the number of samples
N recorded in each field is equal to the sampling frequency f.sub.s
divided by the duration of a field,
##EQU4##
As mentioned above, each sample is formed of a 26-bit word with 13 bits
representing the left-channel audio signal and 13 bits representing the
right-channel, audio signal of a stereo signal. Also, three words (or
three left and right channel samples) are provided during each horizontal
line interval. Hence, the number of horizontal line intervals during each
field that are occupied by pulse encoded audio signals is equal to 735/3,
or 245 line intervals. Thus, the vertical blanking interval in each field
should be 262.5-245=17.5H, or 17.5 horizontal line intervals.
The apparatus of FIG. 1 operates with the foregoing parameters to record
pulse encoded audio signals on a magnetic medium and to reproduce such
signals therefrom. As shown, the system includes a recording channel
comprised of a low-pass filter 4L, a sampling circuit 5L, an
analog-to-digital (A/D) converter 6L and a parallel-to-serial converter 7
for the left channel and a low-pass filter 4R, a sampling circuit 5R, an
analog-to-digital (A/D) converter 6R and parallel-to-serial converter 7
for the right channel. The system also includes a reproducing channel
comprised of a serial-to-parallel converter 17, digital-to-analog (D/A)
converter 18L and low-pass filter 19L for the left channel and
serial-to-parallel converter 17, a digital-to-analog (D/A) converter 18R
and a low-pass filter 19R for the right channel. As may be appreciated,
the recording channel is adapted to supply the pulse encoded audio signals
(hereinafter, pulse signals) to VTR 1 for recording, while the reproducing
channel is adapted to supply the pulse signals reproduced by VTR 1 to
suitable sound reproduction devices (not shown). To accommodate the
different sampling and recording frequencies f.sub.s and f.sub.t,
respectively, and furthermore, to permit the pulse signals to be combined
with simulated horizontal and vertical synchronizing pulses (to be
described) without loss of pulse data, a memory device 8 is provided
between the recording channel and the VTR, while a memory device 16 is
provided between the VTR and the reproducing channel. In a practical
embodiment, both memory devices are combined into a single addressable
memory, such as a random access memory (RAM) that is used selectively
during a recording or reproducing operation.
Low-pass filter 4L is coupled to an audio input terminal 3L to receive the
left-channel audio signal and to supply this audio signal to sampling
circuit 5L. As one example, the sampling circuit coded representation, for
example, a parallel 13-bit signal, of the analog sample. These parallel
bits are supplied to parallel-to-serial converter 7 for serialization.
Similarly, the right-channel audio signal is received by an audio input
terminal 3R, and low-pass filter 4R, sampling circuit 5R and A/D converter
6R function to supply a 13-bit pulse encoded representation of the
right-channel audio signal sample to parallel-to-serial converter 7.
Although not shown in detail, it is apparent that the parallel-to-serial
converter is controlled by clock pulses applied thereto by pulse generator
10 for producing the 13 serialized bits of one channel, for example, the
left channel, followed by the 13 serialized bits of the other channel.
The pulses produced by parallel-to-serial converter 7 are supplied to
memory 8 to be written into addressed locations therein in response to
write pulses derived from pulse generator 10. In a preferred embodiment
described below, the memory is a RAM and each pulse is stored in a
separately addressed location. Thus, the block designated "memory" also
includes suitable control circuitry.
Since the sampling rate f.sub.s is less than the signal recording frequency
f.sub.t, memory 8 functions to vary the time domain of the pulse signals
so as to adapt the pulse signals for recording. That is, these pulse
signals are subjected to a time-compression operation. To this effect, the
pulse signals previously stored in memory 8 are read out from their
addressable locations in response to read pulses derived from pulse
generator 10, and then supplied through a mixer circuit 9 to VTR 1. The
purpose of the mixer circuit is to add the simulated video synchronizing
signals to the pulse signals read out of memory 8, thereby enabling VTR 1
to be controlled in its operation in the usual manner, which is known to
the television art and need not be explained herein.
Pulse generator 10 is a timing circuit to which reference clock pulses,
such as produced by reference oscillator 11, are supplied, these reference
clock pulses being used to generate the aforementioned sampling pulses,
converter control pulses, memory write and read pulses, and video
synchronizing pulses.
The format in which the pulse encoded audio signals are recorded by VTR 1
is shown in FIG. 2A. One complete frame is shown as being comprised of an
even field followed by an odd field, the fields being separated by the
vertical blanking interval, as is conventional for a video signal. This
vertical blanking interval usually includes 10 or 10.5 horizontal line
intervals which are provided with no video information, then a period of
equalizing pulses occupying 3 horizontal line intervals, then a period of
vertical synchronizing pulses occupying another 3 line intervals, followed
by another period of equalizing pulses and 1.5 or 1 line intervals which
are provided with no video information. Thus, a conventional video signal
has a vertical blanking interval of 20 horizontal line intervals. The
duration defined by the first 10 or 10.5 line intervals in the vertical
blanking interval is used by VTR 1 for head switch-over; that is,
switching from one rotary head to the other. Usually, the second set of
equalizing pulses is used to define the video retrace interval. However,
when VTR 1 is used to record audio information, this second set of
equalizing pulses is not necessary. Hence, the vertical blanking interval
can be shortened by three line intervals, thus extending the time during
which useful information (i.e., audio information) can be recorded.
Therefore, as shown in FIG. 2A, the pulse encoded audio signals are
recorded in an "even" field in a slant track by VTR 1, followed by a
vertical blanking interval formed of 10.5 line intervals followed by 3
line intervals of equalizing pulses and 3 line intervals of vertical
synchronizing pulses and then 1 line interval. Succedding this vertical
blanking interval is the "odd" field of pulse encoded audio signals,
followed by a vertical blanking interval formed of 10 line intervals, then
3 line intervals of equalizing pulses, 3 line intervals of vertical
synchronizing pulses and then 1.5 line intervals. In both the "even" and
"odd" fields, the pulse signals are recorded as 735 successive words, each
word being formed of 26 bits to represent the left and right channel
samples, and 3 words being provided during each horizontal line interval.
While these words are recorded similarly in each field, the "even" field
of pulse data follows the vertical synchronizing pulses by 1.5 line
intervals, while the "odd" field of pulse data follows the vertical
synchronizing pulses by 1 line interval.
As shown in greater detail in FIG. 2B, successive words are separated by
simulated synchronizing pulses H.sub.D. These synchronizing pulses
resemble horizontal synchronizing pulses, but are of three times the
horizontal synchronizing frequency f.sub.h. Synchronizing pulses H.sub.D
are of a duration equal to two data bits and are of a period that is
one-third the line interval. The synchronizing pulses are produced by
pulse generator 10 as aforesaid, and are less than the pulse amplitude of
the pulse encoded audio information. In one example the ratio of
synchronizing pulse level H.sub.D to data pulse level is 3:7, with the
synchronizing pulses being negative. These synchronizing pulses can be
inserted into "gaps" between successive words, which gaps can be provided
by parallel-to-serial converter 7, or by the read-out operation of memory
8, as will be described below, and which coincide with the synchronizing
pulses produced by pulse generator 10. For the purpose of simplification,
the pulse data shown in FIG. 2B is assumed to be formed of alternating 1's
and 0's.
In a conventional video signal, the equalizing pulses are negative and are
twice the frequency of the horizontal synchronizing pulses. The vertical
synchronizing pulses also are twice the frequency of the horizontal
synchronizing pulses, but are positive. Consistent with this video signal
format, the equalizing pulses here recorded on VTR 1 are negative and are
twice the frequency of the synchronizing pulses H.sub.D ; while the
vertical synchronizing pulses are positive and are twice the frequency of
synchronizing pulses H.sub.D, as shown in FIG. 2C. The width of each
equalizing pulse is equal to 1-bit width, and the width of each vertical
synchronizing pulse is equal to 2-bit widths.
The signal format of the pulse encoded audio signals, as shown in FIGS.
2A-2C, is very similar to that of a conventional video signal and,
therefore, readily can be recorded by VTR 1. That is, the VTR includes
servo control apparatus which is responsive to the vertical synchronizing
signal for controlling the rotation of the magnetic heads and the movement
of tape and time-base error correcting circuitry which is responsive to
the horizontal synchronizing signal to correct for time-base error during
signal playback. This apparatus and circuitry likewise respond to the
vertical synchronizing signals and synchronizing pulses H.sub.D which are
provided with the pulse encoded audio signals, as shown in FIGS. 2A-2C.
In view of the foregoing, if the pulse signals were recorded at the same
rate at which they are produced, the fact that the audio signal is
continuous means that there would not be any available interval to insert
the aforementioned vertical synchronizing signal. Rather, a portion of the
audio information would have to be replaced by the vertical synchronizing
signal, thus degrading the quality of the audio information which is
reproduced. However, since time compression of the pulse signals is
achieved by the operation of memory 8, a suitable interval is provided
within which the vertical synchronizing signal can be inserted without
impairing the audio information.
Returning to FIG. 1, after the aforedescribed pulse-encoded audio signal is
recorded by VTR 1, it may be reproduced subsequently. For this purpose,
the reproducing channel is shown connected to an output terminal 2.sub.0
of the VTR. This reproducing channel may be in combination with the
illustrated recording channel, or it may form separate apparatus. In
addition to memory 16, serial-to-parallel converter 17, D/A converters 18
and low-pass filters 19, described above, the reproducing channel also
includes a filter 12 coupled to VTR output 2.sub.0 for removing noise
components in the reproduced pulse signals, a wave shaping circuit 13
coupled to filter 12 for reshaping the pulse signals, a synchronizing
signal separator circuit 14 coupled to wave shaping circuit 13 for
separating the synchronizing signals from the reproduced pulse signals,
and a data extracting circuit 15 coupled to separator circuit 14 for
passing, or transmitting, the data pulses to memory 16. A pulse generator
21 is coupled to separator circuit 14 for sensing the synchronizing
signals and for generating various timing signals in response thereto. As
illustrated, these timing pulses are applied to data extracting circuit
15, memory 16, serial-to-parallel converter 17 and D/A converter 18.
In operation, VTR 1 reproduces the pulse signals recorded in the slant
tracks, as shown in FIGS. 2A-2C, at the same rate as the signal recording
rate. Synchronizing signal separator circuit 14 and data extracting
circuit 15 remove synchronizing pulses H.sub.D and those pulses in the
vertical blanking interval occupying the 17.5 horizontal line intervals,
illustrated in FIGS. 2A and 2C. The resultant pulse data signal thus
includes a gap between fields of useful pulse signals. Memory 16 writes
these pulse signals into addressable locations therein at the pulse
playback rate, and reads them out at the original sampling rate as
determined by timing pulses applied by pulse generator 21. Hence, time
expansion of the reproduced pulse signals is achieved, effectively
"stretching" the duration of each data word to be the same as that
produced originally by parallel-to-serial converter 7.
The time-expanded serialized pulse signals read out of memory 16 are
converted to parallel form by serial-to-parallel converter 17, and the
left channel (13-bit) encoded audio signal is converted to analog form by
D/A converter 18L while the right channel (13-bit) encoded audio signal is
converted to analog form by D/A converter 18R. After filtering in low-pass
filters 19L and 19R, the left channel audio signal is provided at output
terminal 20L and the right channel audio signal is provided at output
terminal 20R.
Memory 16 is controlled by timing pulses generated by pulse generator 21
which are derived from the reproduced synchronizing signals, including
synchronizing pulses H.sub.D. Accordingly, if there is any time-base error
in the reproduced signals, such as jitter, this time-base error is
accounted for when the pulse signals are written into the memory. Such
time-base error therefore is substantially removed.
Hence, a conventional video signal recorder, such as VTR 1, can be used to
record and reproduce audio signals with high fidelity, without requiring
any structural change or modification in the recorder itself.
RECORD/PLAYBACK CONTROL
Referring now to FIG. 3, a portion of the overall system shown in FIG. 1 is
illustrated in greater detail. The illustrated circuitry is used to
control memory device 8 (16) for pulse recording and reproducing
operations by VTR 1, the memory device here being identified by reference
numeral 31 from which pulse data is supplied to VTR 1 through mixer 9 and
to which pulse data is supplied by the VTR through a preamplifier 30. Also
illustrated is a parallel-serial/serial-parallel converter 37 which is a
practical embodiment of parallel-to-serial converter 7 capable of
serializing pulse data during a recording operation, and also of
serial-to-parallel converter 17 for converting a serial pulse train into
parallel form during a reproducing operation. Thus, pulse encoded audio
information produced by A/D converters 6R and 6L is serialized by
converter 37 and then supplied to memory 31 wherein its time axis is
compressed before being supplied through mixer 9 to VTR 1 for recording.
As one example, the 26-bit parallel data word (FIG. 2B) supplied to
converter 37 by A/D converter 6R and 6L may be serialized into 28 bits,
thus adding the aforenoted 2-bit "gap" into which the synchronized pulses
H.sub.D can be inserted in mixer 9. During signal playback, the pulse data
reproduced by VTR 1 is supplied through preamplifier 30 to memory 31,
wherein the time axis thereof is expanded, and then reconverted to
parallel form by converter 37 before being transformed into an analog
audio signal by D/A converters 18L and 18R. This data signal path is
represented by the double lines shown in FIG. 3.
Control over memory 31 and the data signal path is achieved by appropriate
control signals transmitted along control signal paths represented by the
single line in FIG. 3. Although single lines are shown, in some instances,
a single line represents plural conductors. The control circuitry is
formed of reference oscillator 11, synchronizing signal generator 33,
clock pulse generator 34, START/STOP signal generator 35, synchronizing
signal separator 36, sync signal control circuit 36', mode signal
generator 47 and memory control circuit 32. Also shown are various
record/playback selector switches 41 through 45, adapted | | |
