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Vertical aperture correction circuit
   
Document Number
US Patent 4160265
Issued Date
July 3, 1979
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Abstract
A video signal processing circuit, particularly for use in conjunction with a single-tube indexing color television camera, provides an output video signal to which a vertical aperture correction has been added, and which cancels undesired line-to-line amplitude changes, thereby preventing line-crawling distortion. The video signal processing circuit includes an input circuit to which an input video signal is supplied, a delay circuit for delaying the input video signal from the input circuit by one horizontal scanning interval, a signal squaring circuit for squaring the difference in level between the input video signal and the delayed input video signal, and a mixing circuit for combining the input video signal with the squared signal output from the squaring circuit. The squaring circuit can include a multiplier circuit, or a square-law characteristic FET, to which the difference in level between the delayed and undelayed input video signals is applied. Alternatively, the squaring circuit may include a multiplier FET to which the delayed and undelayed input video signals can be directly applied.
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Vertical aperture correction circuit - US Patent 4160265 Drawing
Drawing from US Patent 4160265
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Number of Claims:
16
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Owner
Sony Corporation (Tokyo,JP)
Published
July 3, 1979
Application Number
05/897,426
Filed
April 18, 1978
US Classification
348/628   348/630
Int'l Classification
H04N   5/208   (20060101)  
Examiner
Priority Data
Apr 25, 1977 [JP] 52-46784
USPTO Field of Search
358/37   358/162   358/96  
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