A coaxial data bus distribution apparatus for coupling a variable number of peripheral devices to the data bus with a predetermined electrical distance between each point of coupling. A coaxial cable of predetermined length is connected between the output connector of a first input-output pair of coaxial connectors and the input of a second pair of coaxial connectors. Connection between the coaxial connector pair, mounted on a bus interconnect board, and a peripheral device is made by a predetermined length two wire non-coaxial connection to a peripheral device back plane.

A backplane comprises several socket connectors that are arranged in parallel, side by side on a side that faces the modules. The socket connector has pins which form a pin field that face away from the modules. At least one bus comprises at least one bus line. A bus contact pin of each socket connector of the bus has an associated contact pin. These contact pins are electrically connected to each other with a bus line. Each contact pin can be electrically connected with a jumper plug to its associated bus contact pin. A backplane comprising a bus that extends beyond the modules is thus obtained where modules can be separated from the bus without having to pull the modules from their plug-in locations on a module carrier.

Each printed circuit board (PCB) on a backpanel has an associated set of power supply studs and power supply pins at an edge of the backpanel. The PCBs can be powered commonly via power supply buses interconnecting the studs. Alternatively, the PCBs can be powered individually via respective power supply PCBs which are inserted into connectors formed partly by the power supply pins and partly by pins on an additional, power supply, backpanel which is mounted to extend contiguously from and in the same plane as the first backpanel. The two arrangements can be combined to power groups of PCBs individually with all of the PCBs in each group being powered commonly.

A hardware-based emulator is partitioned onto two boards. An emulation board has field-programmable gate array (FPGA) chips mounted on a top surface, and connection posts protruding through to the bottom surface. The I/O pins of the FPGA chips that carry emulated signals are connected to the connection posts but not directly to other FPGA chips on the emulation board. An interconnection board has a grid of wire-wrap posts. The tops of the wire wrap-posts mate with the connection posts when the emulation board is plugged in to the interconnection board. The wire-wrap posts extend through the interconnection board and out the bottom surface. Interconnection is made by wire-wrap wires wound around the wire-wrap posts. Thus interconnection between FPGA chips on the emulation board is made by wire-wrap on the interconnection board, while the logic gates are emulated in the FPGA chips on the separate emulation board. The interconnection can be changed by discarding the interconnection board and wrapping a new interconnection board, while using the same FPGA's on the emulation board. FPGA's are not needed for interconnecting other FPGA chips, thus reducing cost.