An embedded controller disk-drive system including a microprocessor features writing and reading of compressed/decompressed data having an arbitrary length to a rigid disk drive in an efficient manner which is transparent to a host of the disk-drive system. A compression factor relating a size of a logical block to the number of bytes stored in a physical sector on the rigid disk is selected and stored in the microprocessor. The data string is compressed, whereupon the microprocessor generates a specialized table containing descriptor field information for each logical block. The descriptor field contains information on a physical block address corresponding to the location of the compressed data string, the length of the compressed data string, and also, for overflow data, linking sector information for linking the compressed data string between two or more physical blocks on the rigid disk.

A data transmission control device for controlling the data transfer between two memory means on the basis of an instruction from a processor is disclosed in which the instruction from the processor is decoded, a transfer request is issued to each memory means a plurality of times, depending upon a transfer unit indicated by the decoded instruction and an access unit of each memory means, a data buffer is provided between the memory means to temporarily store data whichis transferred from one of the memory means to the other memory means, and the issue of a transfer request to each memory means is allowed or stopped in accordance with the quantity of data stored in the data buffer.

In a data processor having a paging system, a list is kept of the disk seek time when a page of information is brought into processor memory from a disk storage device. (Seek time is the time for moving the disk read-write head radially inward or outward to the next track that is to be accessed.) The average seek time for the pages in memory is calculated and is compared with a reference value of seek time. When the average reaches the reference, the pages in memory are reordered on the disk. This reordering takes place as the pages are bumped from memory in the normal process of paging, and the pages are relocated on the disk tracks in the physical order in which the pages were originally brought into memory. If approximately the same pages are fetched again in approximately the same sequence, the read-write head of the disk drive will be moved a shorter distance between successive disk accesses with reduced backtracking. The invention is particularly intended for a data processor of intermediate size that is large enough to use a paging system but small enough to use a disk drive that has an appreciable seek time.

A scanning unit is incorporated in a computer system communicable with another computer system for searching a random access memory unit for a message with the top priority as well as for identifying a received message with the message already stored in the random access memory unit, and a central processing unit is released from the scanning and the identification, thereby improving the throughput of given tasks.

In the operation of a network of data processing units, a method and apparatus for transferring information between units in a multi-processor environment at high throughput rates. The high throughput rates are achieved by concurrent send/receive direct-memory-access transfers between buffer memories associated with each unit. The invention provides for direct-memory-access (DMA) transfers between a buffer memory and the data port of the sending unit and direct-memory-access transfers between this data port and the buffer memory of the receiving unit; thus eliminating shared-memory resource allocation, memory access arbitration and other programmed operations which normally require execution of several instructions by each unit's processor for each transfer. Each unit interfaces with the system bus through a message transfer facility which groups the buffer memory, the output data port, an attention identification register, resident traffic control DMA and data processors and optional miscellaneous function expansion. Each message transfer is initiated by the sending unit placing on the system bus the address of the targeted receiving unit attention identification register, and the sending unit unique identification. The receiving unit, upon recognizing the identification code in its attention register, initiates the direct-memory-access transfer.