Four-pole circuit modules constructed in integrated injection logic (I.sup.2 L), each four-pole circuit having two signal inputs, a control input, and a signal output line. The signal output line is alternatively connected to one of the signal inputs by each of the two values of a bivalent control signal. This two-level logic can be used in multiplexers in which the four-pole circuits are successively arranged in two or more levels. A shift register composed of master-slave flipflops is obtained by connecting the signal output lines of a series of four-pole circuit modules to one of the signal input lines of the respective four-pole circuit modules and to a signal input line of the next four-pole circuit. Four-pole circuits can be arranged in a series with common control and different combinations of input signals in order to form an arithmetic member for one bit per input quantity. The four-pole circuit module is very suitable for computer-aided design (CAD), due to the advantageous location of the connection points and that small modifications in the geometry of the modular four-pole circuit modules implicitly realize additional inversion operations. The four-pole circuit module is modified to form a comparison circuit or an EXCLUSIVE-OR generator by other modifications.
The invention relates to a circuit arrangement having several signal paths which can be activated by a switchable current source. For the current source, use is made of I.sup.2 L gates whose injector connections are combined in two groups. When a switch-over is made from one signal path to another, a decreasing current is applied to the injector connection of the I.sup.2 L gate connected to one signal path while an increasing current is applied to the corresponding connection of the I.sup.2 L gate associated with the other signal path.
Two flip-flop circuits are employed to provide a positive output and an its inversion output so as to produce the inverted signal of an input signal necessary to provide the function of an exclusive-OR circuit.
