There is disclosed a differential amplifier which comprises bipolar transistors which may be produced using MOS technology and wherein the amplifier is particularly useful when the transistors have a poorly defined current gain. The amplifier includes a first pair of transistors having emitters connected in common and having bases forming the inputs to the differential amplifier. A second pair of transistors identical to the first pair are coupled such that the emitters and bases of said second pair are connected respectively to the emitters and bases of the first pair. The collectors of the second pair of transistors are connected to a current generator and to the input of a transconductance amplifier such that the transconductance amplifier causes the sum of the emitter currents of the first and second pairs of transistors to be controlled by the current supplied by the current generator.

An operational amplifier circuit comprised of complementary MOS transistors and having a bias section, a differential amplifier section, a level shift stage and an output stage, provides for frequency compensation using two capacitors. One capacitor, connected between the differential amplifier section and the output stage through a CMOS transmission gate that functions as a resistor, acts as the dominant pole of the transfer function. A second capacitor between the amplifier section output node and a level shift transistor, functions to remove the secondary poles in the transfer function and cause the dominant pole to occur at a higher frequency.

A differential input stage is provided having primary and secondary differential input transistors, wherein the secondary differential transistors operating in response to the same common mode input signal conduct equal currents as flowing through the primary differential transistors into a dual output current mirror for supplying the nominal current flowing in the primary differential transistors. Since the dual output current mirror is supplying the current flowing through the primary differential transistors, a differential to single-ended converter normally operating in response to differential currents flowing through the primary differential transistors does not conduct any incremental current induced by the common mode input signal, hence, there is no change in the output voltage thereof.

An input differential amplifier stage (10), which feeds an output stage (20), has a feedback loop originating at a node (N.sub.1) in one branch, for controlling the current-source transistor (M.sub.5) of that stage. The feedback loop is characterized by a direct connection to the gate electrode of a transistor (M.sub.8) which drives the output stage (20), while the output at another node (N.sub.2), in the other branch of the differential amplifier stage (10) is fed to another transistor (M.sub.9) which also drives the output stage (20).

An interlock mechanism operably associated with the plug receptacle of an explosion-proof housing whereby a plug may be inserted into or removed from the receptacle only when electrical current is not delivered to the receptacle. The interlock mechanism comprises a safety shaft for engaging a plug inserted into the receptacle, a reciprocating shaft operatively connected to a circuit breaker handle, and a locking pin for securing the safety shaft in a standby position, whereby the circuit breaker handle cannot be moved unless the safety shaft engages the plug casing, the safety shaft cannot be disengaged from the plug casing unless the circuit breaker handle has been moved to an off position, and the safety shaft will not engage the plug casing until it is released by the locking pin after the locking pin is biased to its disengaged position by the inserted plug.