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BACKGROUND OF THE INVENTION
1. Field of the Invention
Our invention relates to a recording and reproducing method, and in
particular to such a method employing a pulse-code modulation (PCM)
scheme. Still more particularly, our invention deals with a PCM recording
and reproducing method well calculated to permit distortionless
reconstruction of the original signal in spite of possible dropout errors.
The method of our invention is disclosed herein as adapted for recording
and reproducing audio signals on and from recording media such as magnetic
tape or laser discs, but with no unnecessary limitations thereto being
intended.
2. Description of the Prior Art
The processing of audio and video signals by the PCM technique has been
known and practiced for some time now. With PCM, the signals can be
recorded and reproduced with an extra-ordinarily high degree of
faithfulness if no errors are introduced into the signals themselves,
because the signal quality is unaffected by the qualities of the
transmission media through which they journey. In practice, however, the
signals are easy to suffer errors.
If, for example, foreign particles are attached to recording media such as
magnetic tape, or if the recording media have some surface imperfections,
then the signals will not be properly recorded on or reproduced from such
defective regions of the recording media. These are causes for the problem
known as dropouts. If a dropout error occurs to even one bit of a PCM
word, the word may become unable to correctly represent the corresponding
sample, or instantaneous value, of the original analog signal, possibly
introducing noise into the information reproduced.
A variety of methods have been suggested and used for the correction or
elimination of dropouts. The following four methods are among those best
known: (1) to doubly or multiply record the same PCM signal and to
reproduce either of the recordings having no dropout error; (2) to record
an analog signal in both PCM and analog format and, upon detection of a
dropout error in the PCM signal, to use the corresponding portion of the
analog signal; (3) to interpolate an approximate value computed from the
values preceding and succeeding the lost value; and (4) to compensate for
the lost value by holding the preceding value.
The problem of dropouts can be overcome, to a considerable degree, by the
use of the above enumerated methods, either singly or in combination of
two or more. Each of these conventional methods has its own drawbacks,
however.
Method (1), when employed singly for dropout elimination, necessitates the
recording of the same PCM signal a considerable number of times. Method
(2) requires the provision of additional equipment and an additional track
for recording an incoming analog signal in analog format, and further
precise synchronization must be realized between the analog and the PCM
signals. According to method (3), complex circuitry is required for the
computation of approximate values to be interpolated. This third method,
moreover, is incapable of accurately compensating for a plurality of
values lost consecutively. Method (4) permits easier compensation but is
also incapable of accurately compensating for a plurality of values lost
consecutively.
SUMMARY OF THE INVENTION
It is among the objects of our invention to provide an improved PCM
recording and reproducing method which permits highly accurate and easy
compensation for dropout errors.
Another object of our invention is to provide such as PCM recording and
reproducing method which is compatible with other error correction or
elimination methods.
A further object of our invention is to provide a PCM recording and
reproducing method which can be practiced by use of a system built of
readily available components.
A still further object of our invention is to provide a PCM recording and
reproducing method suitable for use with audio signals, among other types
of signals.
According to the method of our invention, stated in brief, an analog signal
to be recorded is sampled at regular intervals, and the successive samples
are converted into a sequence of words in accordance with a prescribed
code of pulses. Every preselected number of the words are grouped into a
notional block, and the words of each of the successive blocks are divided
into at least two sub-blocks, in such a manner that the words of the
sub-blocks are in at least one-by-one alternation, as will become more
apparent as the description proceeds. These sub-blocks of the successive
word blocks are recorded in different regions on a recording medium.
For reproducing the thus-recorded signal, the sub-blocks of the word blocks
are reconverted into an electrical signal. The words of each block which
have been divided into the sub-blocks are then rearranged into the
original order, and the successive blocks of words are then reconverted
into the original analog format.
Preferably, the odd words of each word block are grouped into the first
sub-block, and the even words into the second sub-block. For this dividing
the odd and the even words of each block into the first and the second
sub-blocks, there may be employed a memory and two addressing circuits.
The words of each block are first written sequentially in successive
storage locations in the memory as dictated by one of the addressing
circuits. Then, under the control of the other addressing circuit, the odd
words of the block are read out to form the first sub-block, and the even
words are subsequently read out to form the second sub-block.
The sub-blocks of the word blocks are recorded in successive regions on the
recording medium such as magnetic tape. It is essential that the two
sub-blocks of each block be recorded in different regions on the medium. A
conventional video tape recorder may be employed for recording the signal
as above. The rearrangement of the words of each block into the initial
order, following their reconversion into an electrical signal from the
recording medium, can also be effected by use of a memory and two
addressing circuits.
Thus, even if several adjacent words of one sub-block are lost
simultaneously, it is highly unlikely that those words of the other
sub-block which are to intervene between the lost words be lost at the
same time. When the words of the two sub-blocks are rearranged into the
original order, therefore, no two consecutive words are lost. The several
alternately lost words can be readily compensated for, as by the technique
of interpolation or of holding the previous words.
The above and other objects, features and advantages of our invention and
the manner of attaining them will become more readily apparent, and the
invention itself will best be understood, from the following description
taken in conjunction with the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a block diagram of the recording section of a system which can be
employed for the PCM recording and reproduction of audio signals on and
from magnetic tape in accordance with the method of our invention;
FIGS. 2A through 2H are representations of an audio signal in various
stages of processing by the PCM recording system of FIG. 1;
FIG. 3 is a representation of the bits of each word of the PCM signal being
processed by the system of FIG. 1;
FIG. 4 is a waveform diagram showing an example of the pulse pattern of the
word given in FIG. 3;
FIG. 5 is a fragmentary view of magnetic tape on which is recorded the PCM
signal by the system of FIG. 1, the view being explanatory of the
arrangement of regions on the tape in which are doubly recorded the
sub-blocks of the successive blocks of words;
FIG. 6 is a block diagram of the reproducing section to be combined with
the recording section of FIG. 1 to provide the PCM recording and
reproducing system suitable for carrying out the method of our invention;
and
FIG. 7 is a schematic plan view of a laser disc which can also be employed
as a recording medium in the practice of the method of our invention.
DETAILED DESCRIPTION OF THE INVENTION
The PCM recording and reproducing method of our invention will first be
described briefly in connection with the recording section, shown in FIG.
1, of a PCM recording and reproducing system suitable for carrying out the
inventive method. Utilizing a video tape recorder (VTR) for recording
audio signals, the illustrated PCM recording system has an input terminal
10 connected to a sample-and-hold circuit 12, to which is also connected a
clock 14. The sample-and-hold circuit 12 is thus adapted to sample the
incoming analog audio signal at a rate determined by the accurately timed
output pulses from the clock 14.
The output of the sample-and-hold circuit 12 is connected to an
analog-to-digital converter 16 whereby the analog samples, or
instantaneous values, of the audio signal are converted or modulated into
words or groups of digital pulses in accordance with a prescribed pulse
code. The output of the analog-to-digital converter 16 is connected to a
memory 18, preferably of the scratch-pad design, and thence to a
parallel-to-serial converter 20. The analog-to-digital converter 16 puts
out the PCM signal with the bits of its code words in parallel format, and
these words are written in the scratch-pad memory 18 with their bits in
parallel format. The word bits of the PCM signal are, however, rearranged
into serial format by the subsequently connected parallel-to-serial
converter 20.
Further connected separately to the scratch-pad memory 18 are first and
second addressing circuits 22 and 24 which are both under the control of
the clock 14. The first addressing circuit 22 is for use in sequentially
writing the words of the PCM signal in the storage locations in the memory
18. The second addressing circuit 24 is for use in reading out or
retrieving the PCM words from the memory.
The PCM words are written in the memory 18 in the sequence of their
samplings but are retrieved therefrom in a completely different sequence.
For their retrieval from the memory 18 in the desired sequence, the
successive words are divided into a series of notional blocks each
comprising a preselected number of such words. The alternate words (e.g.,
odd words) of each block are first retrieved successively, followed by the
successive retrieval of the remaining words (e.g., even words) of the
block, thereby providing first and second sub-blocks of each word block.
This reading operation is performed, for example, twice consecutively for
each of the successive word blocks, for purposes which will become
apparent presently.
Besides being connected directly to the parallel-to-serial converter 20,
the memory 18 is also connected thereto via a parity or odd-even check bit
generator 26. This generator 26 delivers parity check bits to the
parallel-to-serial converter 20, so that the latter, also under the
control of the clock 14, puts out in the above sequence the PCM words of
serial format carrying the parity check bits.
The clock 14 is further connected to a sync pulse generator 28 which
generates grouping and subgrouping sync pulses. The output of the
parallel-to-serial converter 20 and the output of the sync pulse generator
28 are interconnected via resistors 30 and 32 as shown, so that the words
delivered from the converter 20 are combined with the grouping and the
subgrouping sync pulses to form a composite PCM signal. This composite PCM
signal is of three voltage values representing respectively the logical
1's and 0's of the pulse code and the sync pulses.
The grouping sync pulses, which in fact are similar to the vertical sync
pulses of television signals, are generated at time intervals such that
each preselected number of double word blocks from the parallel-to-serial
converter 20 are grouped together so as to permit, for example, the
convenient editing of tape after the composite PCM signal is subsequently
recorded thereon. The subgrouping sync pulses are generated at much
shorter time intervals and are intended to unitize the bits of every one
or more words. The use of such sync pulses in the art of PCM recording and
reproduction has been known.
Generally designated 34 is a VTR comprising a frequency modulator 36, a
recording amplifier 38, and a record or a record/reproduce head 40. By
this VTR 34 of prior art design is the composite PCM signal
frequency-modulated, amplified, and recorded on magnetic tape 42. In thus
recording the composite PCM signal on the tape 42 in FM format, the
logical 1's of the signal may be translated, for example, into a frequency
of 5.4 MHz, the logical O's of the signal into 4.6 MHz, and the sync
pulses into 3.8 MHz. It is thus seen that the composite PCM signal can be
recorded on the tape 42 in the same fashion as composite video signals.
The PCM recording system of FIG. 1 is easy to fabricate with the use of
commercially available ICs for its component circuits. For example, the
memory 18 can be formed by the IC Am 91L2 manufactured by Advanced
Microdevices, Inc. (AMD); the parallel-to-serial converter 20 by the IC
SN74LS165 manufactured by Texas Instruments, Inc. (TI); the first
addressing circuit 22 by the IC SN74LS163 or SN74LS293 manufactured by TI;
the second addressing circuit 24 also by the IC SN74LS163 or SN74LS293;
and the parity check bit generator 26 by the IC SN74LS86 manufactured by
TI.
The PCM recording method of our invention will now be described in more
detail in connection with the system of FIG. 1, with reference made also
to FIGS. 2A through 2H which represent the audio signal being processed by
the system. Let it be assumed that the analog audio signal supplied
through the input terminal 10 of the PCM recording system has the waveform
shown in FIG. 2A. The sample-and-hold circuit 12 samples this audio signal
at moments t1, t2 . . . t128, t1', t2'. . . in time, as indicated in FIG.
2B, thereby providing analog audio signal samples a1, a2 . . . a128, b1,
b2 . . . The sampling rate is determined as aforesaid by the clock 14.
The successive samples of the incoming audio signal produced by the
sample-and-hold circuit 12 are then modulated in accordance with the
prescribed pulse code into a sequence of pulse groups or words A1, A2 . .
. A128, B1, B2 . . . , as represented in FIG. 2C. The series of capitals
A, B, C . . . in FIG. 2D represent the successive blocks of words, with
each word block containing 128 words A1 through A128, etc. These word
blocks A, B, C . . . are sequentially written in the memory 18. Although
no particular distinction is actually made between the word blocks A, B, C
. . . in writing them in the memory, the words are shown divided into
these notational blocks to facilitate the understanding of the subsequent
reading operation, which will be explained presently.
Although the individual words of the PCM signal are indicated in FIG. 2
merely by the characters A1, A2, etc., each word is assumed to be composed
of 12 regular bits, plus a parity check bit to be added to the parity
check bit generator 26, as represented in FIG. 3. The indicia MSB and LSB
in FIG. 3 denote the most significant bit and the least significant bit,
respectively. Thus, a given in FIG. 4, the word A1 is represented by a
group of pulses corresponding to, for example, "0001010010010" of the
binary system. In FIGS. 2C through 2H the words of the same word block are
designated by the same capital regardless of whether they carry the parity
check bits or not. Although FIGS. 3 and 4 shows the word bits of the PCM
signal in serial format, these word bits are delivered in parallel format
by the analog-to-digital converter 16 and are written in the memory 18 in
that format, as previously mentioned.
The PCM signal is written word by word in the memory 18 in the order of the
successive samplings, under the control of the first addressing circuit
22. These words are not retrieved from the memory 18 in the order they
were written, however, but in the following sequence. Under the control of
the second addressing circuit 24, the odd words A1, A3, A5 . . . A123.
A125 and A127 of the first word block A in FIG. 2C are first retrieved
sequentially, followed by the sequential retrieval of the even words A2,
A4, A6 . . . A124, A126 and A128 of the first word block, as represented
in FIG. 2F. There are thus obtained the first Aa and the second Ab
sub-blocks of the first word block A, with the words of the two sub-blocks
in one-by-one alternation.
As will be seen also from FIG. 2F, the first sub-block Aa of words A1, A3,
A5 . . . is retrieved from the memory 18 during the time interval t0-t1,
and the second sub-block Ab of words A2, A4, A6 . . . is retrieved during
the immediately succeeding time interval t1-t2. As will be noted upon
comparison of the first word block A given in FIG. 2C and its first Aa and
second Ab sub-blocks given in FIG. 2F, the 128 words A1 through A128
constituting the first word block are all included in the two sub-blocks.
It is also to be noted that the retrieval of the PCM signal from the memory
18 is effected at a speed approximately twice (in practice, slightly more
than twice) as high as the writing speed. This is to read out each of the
word blocks A, B, C . . . of FIG. 2D twice during the time expended for
writing each word block.
FIG. 2E is explanatory of such double reading of each word block. The first
word block A of FIGS. 2C and 2D is read twice, first during the time
interval t0-t1 and then during the immediately succeeding time interval
t1-t2, as indicated by the characters A'A' in FIG. 2E. Further, as
mentioned in connection with FIG. 2F, the odd words of the first word
block A are first read sequentially to provide the first sub-block Aa, and
then the even words of the first word block are read sequentially to
provide the second sub-block Ab. This procedure is performed twice. Each
of the characters A'A' in FIG. 2E, therefore, should be understood to
represent Aa'Ab.
Similarly, the odd words of the second word block B of FIGS. 2C and 2D are
first read sequentially, and then the even words of the second word block
are read sequentially. This procedure is also performed twice, as
indicated by B'B' in FIG. 2E. Thus, by the repetition of the above double
reading operation on each of the subsequent word blocks C, D. E . . . ,
there can be obtained a rearranged sequence of words and word blocks
represented in FIGS 2E and 2F.
The parallel-to-serial converter 20 is supplied with both the PCM signal
retrieved in the above described manner from the memory 18 and the parity
check bit signal from the parity check bit generator 26. The PCM signal of
parallel format from the memory 18 is converted by the converter 20 into
that of serial format, with each of its words composed of 13 serial bits
as illustrated by way of example in FIGS. 3 and 4.
Under the control of the clock 14, the sync pulse generator 28 generates
grouping sync pulses 44 and subgrouping sync pulses 46, as represented in
FIGS. 2G and 2H. The grouping sync pulses 44 are generated at
comparatively long time intervals, as at moments t1 and t2 in time in FIG.
2G. FIG. 2G shows the double word blocks A'A' through F'F' grouped
together between the two grouping sync pulses 44 generated at the moments
t1 and t2.
It should be noted that each of the successive groups of double word blocks
thus formed by the grouping sync pulses 44 does not extend beyond either
of the corresponding two grouping sync pulses. Thus, after recording the
groups of double word blocks A'A' through F'F', G'G'. . . , etc., on the
magnetic tape 42, this tape may be edited by separating the groups of
double word blocks at the points where the grouping sync pulses 44 are
recorded, without the least possibility of separating each of the double
word blocks in so doing.
FIG. 2G shows only several of the subgrouping sync pulses 46, which are
generated at much shorter time intervals than the grouping sync pulses 44.
As clearly seen in FIG. 2H, the subgrouping sync pulses 46 are generated
at moments in time corresponding to the points between every two of the
successive words A1, A3, A5 . . . , A2, A4, A6 . . . , etc., thus
unitizing every two words.
The above grouping 44 and the subgrouping 46 sync pulses are combined with
the PCM signal of FIGS. 2E and 2F, into the composite PCM signal given in
FIGS. 2G and 2H. As will be seen from FIG. 4, this composite PCM signal is
of three values, including V1 and V2 for the logical 1's and 0's,
respectively, of the PCM signal itself and V3 for the grouping and the
subgrouping sync pulses. The characters Aa' and Ab' in FIG. 2H denote the
first and the second sub-blocks, respectively, of the first word block A
or A' including the subgrouping sync pulses 46. Although not shown
specifically, the first and the second sub-blocks of the second word block
B or B', for example, are to be designated Ba' and Bb', respectively, when
combined with the subgrouping sync pulses 46.
FIG. 5 is explanatory of the way the composite PCM signal of FIGS. 2G and
2H is recorded, after frequency modulation and amplification, on the
magnetic tape 42 by the head 40 of the VTR 34. It will be noted that the
composite PCM signal is recorded sub-block by sub-block in successive
predetermined regions on the tape 42. More specifically, the first
sub-block Aa' of the first word block A or A' is recorded in the first
tape region 48, and the second sub-block Ab' of the first word block is
recorded in the second tape region 50 adjoining the first tape region. The
first sub-block Aa' is again recorded in the third tape region 52, and the
second sub-block Ab' is again recorded in the fourth tape region 54. In a
similar sequence the first and the second sub-blocks Ba' and Bb' of the
second word block B or B' are doubly recorded in the fifth to eighth tape
regions. The sub-blocks of the subsequent double word blocks C'C', D'D',
E'E'. . . are likewise recorded in the succeeding tape regions.
As is well known, dropout errors usually occur to data recorded only in
minute portions of the tape, without any regularity. Let it be supposed
that a dropout error occurs to, for instance, the adjoining words A3 and
A5 of the first sub-block Aa' recorded in the first region 48 of the tape
42. It is highly unlikely that a dropout error occur simultaneously to the
word A4 of the second sub-block Ab' recorded in the second tape region 50.
Thus, even if the two words A3 and A5 are lost, the word A4 therebetween
exists to prevent the loss of three consecutive words.
It is thus seen that the PCM recording method of our invention permits
highly accurate reconstruction of the original analog signal. Such
accurate compensation for a missing word or words by interpolation or by
the holding of the preceding word is easy since, in all likelihood, no two
or more consecutive words are to be lost.
Schematically represented in FIG. 6 is a system for use in reproducing the
PCM signal recorded in FM format on the tape 42 according to the method of
our invention. The PCM reproducing system has the VTR including a head 56
which may be either a record/reproduce head unitized with the head 40 of
FIG. 1 or a reproduce head separate from the head 40. The head 56
functions in the well known manner to reconvert the logical 1's of the PCM
signal on the tape 42 into the frequency of 5.4 MHz, the logical 0's of
the PCM signal into the frequency of 4.6 MHz, and the sync pulses combined
with the PCM signal into the frequency of 3.8 MHz.
The output of the head 56 is connected to an amplifier 58 and thence to an
FM detector 60. The FM output signal of the head 56 is therefore amplified
and then detected or demodulated back into the three-value composite PCM
signal such as that shown in FIG. 4. The amplifier 58 is further connected
to a dropout sensor 62, which senses dropout errors from a reduction in
the level of the output signal of the amplifier.
The output of the FM detector 60 is connected both to a PCM signal
separator 64 and to a sync pulse separator 66. The output of the PCM
signal separator 64 is connected to a serial-to-parallel converter 68 and
thence to a scratch-pad memory 70. The output of the sync pulse separator
66 is connected via an addressing circuit 72 to the memory 70.
Separated from the sync pulses by the PCM signal separator 64, the PCM
signal of serial format is converted into that of parallel format by the
serial-to-parallel converter 68. This PCM signal of parallel format is
then delivered to the memory 70. The grouping and the subgrouping sync
pulses separated from the PCM signal by the sync pulse separator 66 are
then delivered to the addressing circuit 72, thereby to be utilized for
controlling the writing of the PCM signal in the memory 70.
Although the PCM signal delivered from the serial-to-parallel converter 68
to the memory 70 has the words of its word blocks arranged as in FIG. 2F,
the words are not arranged in the memory 70 in the sequence of FIG. 2F but
in that of FIG. 2C. Under the control of the addressing circuit 72, the
odd words A1, A3, A5 . . . of the first sub-block Aa are written in every
other one of predetermined storage locations in the memory 70. The even
words A2, A4, A6 . . . of the second sub-block Ab are then written in the
unoccupied storage locations between those occupied by the even words. The
words are thus arranged in the original sequence of A1, A2, A3 . . . in
the successive storage locations in the memory 70. As will be recalled by
referring back to FIG. 2G, each word block is delivered twice
consecutively from the serial-to-parallel converter 68, for purposes to be
described later.
Another addressing circuit 74 is employed for retrieval of the words from
the memory 70. The words of each block can be retrieved sequentially in
the case where they are arranged in the sequence of A1, A2, A3 . . . in
the successive storage locations in the memory 70 as above. It is also
possible, however, to temporarily store the words of each block in the
memory 70 without altering the sequence of FIG. 2C and to retrieve the
words in the sequence of FIG. 2F. In this latter case the word A1 of the
first sub-block Aa is first retrieved and, without retrieving the next
word A3 of the first sub-block, the word 2 of the second sub-block Ab is
retrieved, followed by the retrieval of the word A3.
The output of the serial-to-parallel converter 68 is connected not only to
the memory 70 but also to a parity check circuit 76, which in turn is
connected to one of the inputs of an OR gate 78. The other input of this
OR gate is connected to the dropout sensor 62, and the output of the OR
gate is connected to the memory 70.
The parity check circuit 76 conducts the parity check of the PCM signal
from the serial-to-parallel converter 68, producing an output upon
detection of a parity error. This output from the parity check circuit 76
is delivered to the memory 70 via the OR gate 78 thereby causing the
memory to memorize the address of the erroneous word. The dropout sensor
62 also delivers an output, upon detection of a dropout error, to the
memory 70 via the OR gate 76 thereby causing the memory to memorize the
address of the erroneous word.
Also connected to the output of the serial-to-parallel converter 68 is a
data comparison circuit 80 which has another input connected to the memory
70 and which has its output connected to the memory 70. The output of this
memory 70 is connected to an error corrector 82 and thence to a
digital-to-analog converter 84. The memory | | |
