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Low voltage compound inverter buffer circuit
   
Document Number
US Patent 4228404
Issued Date
October 14, 1980
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Inventors
Widlar; Robert J. (Puerto Vallarta Jalisco,MX)
Map
Abstract
An integrated circuit gain block is obtained by cascading a common collector stage with a complementary common emitter stage. The current density of the common emitter transistor is made sufficiently greater than that of the common collector transistor so that the common emitter V.sub.BE lowest worst case value is higher than the common collector V.sub.BE highest worst case value. This makes the circuit manufacturable in integrated circuit form and permits the circuit to operate from a single power supply potential that can be as low as the series combination of one V.sub.BE added to one transistor collector to emitter saturation voltage. The circuit has a high current gain and is amenable to incorporation into current boosted class B amplifier output stages.
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Low voltage compound inverter buffer circuit - US Patent 4228404 Drawing
Drawing from US Patent 4228404
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Number of Claims:
6
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no comments yet
Owner
Published
October 14, 1980
Application Number
06/008,987
Filed
February 5, 1979
US Classification
330/267   330/288 330/296 330/311
Int'l Classification
H03F   3/30   (20060101)  
Attorney/Law Firm
USPTO Field of Search
330/263   330/267   330/288   330/296   330/297   330/307   330/310   330/311  
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