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Claims  |
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I claim:
1. A method for automatically recognizing the position of a semiconductor
element by investigating the same with respect to at least one rectilinear
edge of an element to obtain adjustment information, comprising the steps
of: illuminating the semiconductor element;
imaging and optically scanning across a semiconductor element image and its
surroundings row-by-row in rows which are substantially parallel to the
investigated edge and generating electrical signals representing the light
intensity of the optically scanned rows;
integrating the instantaneous values of the electrical signals of each row;
storing the integrated values;
comparing the integrated values of adjacent rows and producing bipolar
difference values therefrom;
weighting the difference values of one polarity with a predetermined factor
which corresponds to the roughness of the particular position in the image
decreasing the difference values in a rough zone and increasing the
difference values in a smooth zone;
forming further difference values from the weighted difference values to
emphasize sharp-edge lines of the image; and
providing, by row counting, a signal for correcting the position of the
semiconductor element.
2. The method of claim 1, comprising the further steps of:
storing the scanning results for columns which are orthogonal to the
scanning direction by row number in which they occur indicating their
positions in the column direction; and
logically comparing the results transversely of the columns to distinguish
faulty results from correct results of the investigated edge.
3. The method of claim 1, comprising, in order to determine the x and y
coordinates and the angle of rotation (.phi.), the steps of:
performing the listed steps for a plurality of fields of vision of the
semiconductor element.
4. The method of claim 2, further defined as:
performing the listed steps for three fields of vision of the semiconductor
element.
5. The method of claim 2, further defined as:
performing the steps of scanning in the same direction for each field of
vision.
6. The method of claim 2, further defined as:
performing the steps of scanning in different directions for each field of
vision.
7. The method of claim 2, further defined as:
performing the steps of scanning in orthogonal directions for the fields of
vision.
8. The method of claim 1, wherein the step of illuminating is further
defined as:
orienting the direction of illumination to exploit the thickness of the
element and produce a well defined edge shadow representing a cut edge.
9. The method of claim 8, wherein the element also has an associated system
edge, and in order to detect the system edge, the step of illuminating is
further defined as:
illuminating the semiconductor element with direct parallel illumination so
that the inclination of the system edge reflects the light for imaging in
a weakened form so as to appear as a narrow, dark line.
10. The method of claim 8, wherein:
the step of illuminating is carried out at an angle inclined a few degrees
to the perpendicular; and
the step of imaging is carried out at the angle of reflection.
11. A method for automatically recognizing the position of a semiconductor
element by investigating the same with respect to at least one rectilinear
edge of the element to obtain adjustment information, comprising the steps
of: illuminating the semiconductor element;
imaging and optically scanning across the semiconductor element image and
its surrounding line-by-line substantially parallel to the investigated
edge and generating video signals representing the light intensity of the
scanned lines;
differentiating and rectifying the video signals;
integrating the rectified signals on a line-by-line basis;
phasing the integrated signals with respect to one another; and
integrating the phased signals so that rough zones which manifest singular
smooth locations are integrated into a closed surface to prevent errors.
12. The method of claim 11, wherein the edge is the cut edge of a
semiconductor chip which also has an adjacent system edge, comprising the
further step of:
comparing the integrated signals in the region of the cut and system edges
to identify the cut edge.
13. The method of claim 11, wherein the semiconductor element is a chip
having a cut edge and a system edge, and the step of illuminating is
further defined as:
providing parallel incident illumination of the cut and system edges; and
comprising the further step of:
weighting the line-by-line integrated values with a predetermined signal
representing the roughness;
comparing the weighted and unweighted signals to determine, on the basis of
line-by-line differences, minimum and maximum values which represent the
cut and system edges.
14. The method of claim 11, wherein the semiconductor element is a chip
having a cut edge and a system edge, wherein the step of imaging and
scanning is further defined as:
imaging and scanning with three fields of vision located such that two
fields of vision are spaced along one side of the chip and the third field
of vision is along a side of the chip which is transverse to the one side;
and,
in order to prevent false recognitions in each of the three fields of
vision, comprising the further steps of:
determining, from the information obtained in two columns transverse of the
line scanning direction for at least two of the fields of vision,
respective angles of rotation; and
comparing the angles for equality.
15. The method of claim 11, wherein the step of imaging is further defined
as:
imaging two orthogonally-arranged fields of vision at respective orthogonal
edges of the semiconductor element;
superposing the resulting two images to produce a single image; and
applying the single image to a single image converter.
16. A method for automatically recognizing the position of a semiconductor
element by investigating the same with respect to an edge of the element
to obtain adjustment information, comprising the steps of:
illuminating the element with light to produce a shadow which defines the
edge by a dark/light transition;
imaging and scanning the element image line-by-line substantially parallel
to the edge to produce a video signal;
integrating the video signal in a line-by-line fashion;
forming difference signals from successive ones of the line-by-line
integrated signals;
weighting the difference signals with a predetermined value representing
element roughness;
comparing the weighted and unweighted signals in order to obtain a
comparison value; and
sensing for the maximum comparison value, maximum value which represents
the investigated edge.
17. The method of claim 16, wherein the edge is the cut edge of a
semiconductor chip which also has a system edge, and further comprising
the steps of:
sensing for the minimum comparison value, which minimum value represents
the system edge.
18. A method for automatically recognizing the position of a semiconductor
element by investigating the same with respect to an edge of the element
to obtain adjustment information, comprising the steps of:
illuminating the element with light to produce a shadow which defines the
edge by a dark/light transition;
imaging and scanning the element image line-by-line substantially parallel
to the edge to produce a video signal;
integrating the video signal in a line-by-line fashion;
forming difference signals from successive ones of the line-by-line
integrated signals;
weighting the difference signals with a predetermined value representing
element roughness;
comparing the weighted and unweighted signals in order to obtain a
comparison value; and
sensing for the minimum comparison value, minimum value which represents
the investigated edge.
19. The method of claim 18, wherein the edge is the cut edge of a
semiconductor chip which also has a system edge, and further comprising
the step of:
sensing for the maximum comparison value, which maximum value represents
the system edge.
20. A method for automatically recognizing the position of a semiconductor
element by investigating the same with respect to at least one rectilinear
edge of the element to obtain adjustment information, comprising the steps
of:
illuminating the semiconductor element;
imaging and optically scanning across the semiconductor element image and
its surroundings line-by-line substantially parallel to the investigated
edge and generating video signals representing the light intensity of the
scanned lines;
differentiating and rectifying the video signals;
integrating the rectified signals on a line section-by-line section basis;
phasing the integrated line-section signals with respect to one another;
and
integrating and integrated and phased line section signals so that rough
zones which manifest singular smooth locations are integrated into a
closed surface to prevent errors.
21. Apparatus for automatically recognizing the position of a semiconductor
element by investigating the same with respect to at least one rectilinear
edge of the element to obtain adjustment information, comprising:
means for illuminating the semiconductor element;
means for imaging and optically scanning across the semiconductor element
image and its surroundings line-by-line substantially parallel to the
investigated edge, including means for generating video signals
representing the light intensity of the scanned lines;
means for differentiating and rectifying the video signals;
means for integrating the rectified signals on a line-by-line basis;
means for phasing the integrated signals with respect to one another; and
means for integrating the phased signals so that rough zones which manifest
singular smooth locations are integrated into a closed surface to prevent
errors.
22. The apparatus of claim 21, wherein the edge is the cut edge of a
semiconductor chip which also has an adjacent system edge, comprising:
means for comparing the integrated signals in the region of the cut and
system edges to identify the cut edge.
23. Apparatus for automatically recognizing the position of a semiconductor
element by investigating the same with respect to at least one rectilinear
edge of the element to obtain adjustment information, comprising:
a light source for illuminating the semiconductor element;
an optic for imaging and an image converter optically linked thereto for
optically scanning across, the semiconductor element image and its
surroundings line-by-line substantially parallel to the investigated edge
and generating video signals representing the light intensity of the
scanned lines;
differentiating means connected to said converter and rectifier means
connected to said differentiating means for differentiating and rectifying
the video signals;
first integrating means connected to said rectifier means for integrating
the rectified signals on a line section-by-line section basis;
phasing means connected to said first integrating means for phasing the
integrated signals with respect to one another; and
second integrating means connected to said phasing means for integrating
the phased signals to that rough zones which manifest singular smooth
locations are integrated into a closed surface to prevent errors.
24. The apparatus of claim 23, wherein the edge is the cut edge of a
semiconductor chip which also has an adjacent system, comprising:
means for comparing the integrated signals in the region of the cut and
system edges to identify the cut edges.
25. Apparatus for automatically recognizing the position of a semiconductor
element by investigating the same with respect to an edge of the element
to obtain adjustment information, comprising:
means for illuminating the element with light to produce a shadow which
defines the edge by a dark/light transition;
means for imaging and scanning the element image line-by-line substantially
parallel to the edge to produce a video signal;
means for integrating the video signals in a line-by-line fashion;
means for forming difference signals from successive ones of the
line-by-line integrated signals;
means for weighting the difference signals with a predetermined value
representing element roughness;
means for comparing the weighted and unweighted signals in order to obtain
a comparison value; and
means for sensing the maximum comparison value, which maximum value
represents the investigated edge.
26. The apparatus of claim 25, wherein the edge is the cut edge of a
semiconductor chip which also has a system edge, and further comprising:
means for sensing for the minimum comparison value, which minimum value
represents the system edge.
27. Apparatus for automatically recognizing the position of a semiconductor
element by investigating the same with respect to an edge of the element
to obtain adjustment information, comprising:
means for illuminating the element with light to produce a shadow which
defines the edge by a dark/light transition;
means for imaging and scanning the element image line-by-line substantially
parallel to the edge to produce a video signal;
means for integrating the video signal in a line-by-line fashion;
means forming difference signals from successive ones of the line-by-line
integrated signals;
means for weighting the difference signals with a predetermined value
representing element roughness;
means for comparing the weighted and unweighted signals in order to obtain
a comparison value; and
means for sensing for the minimum comparison value, minimum value which
represents the investigated edge.
28. The apparatus of claim 27, wherein the edge is the cut edge of a
semiconductor chip which also has a system edge, and further comprising:
means for sensing for the maximum comparison value, which maximum value
represents the system edge.
29. Apparatus for automatically recognizing the position of a semiconductor
element by investigating the same with respect to at least one rectilinear
edge of an element to obtain adjustment information, comprising:
illuminating means for illuminating the semiconductor element;
means for imaging and optically scanning across a semiconductor element and
its surroundings row-by-row in rows which are substantially parallel to
the investigated edge, including means for generating electrical signals
representing the light intensity of the optically scanned rows;
integrating means for integrating the instantaneous values of the
electrical signals of each row;
storage means storing the integrated values;
signal comparison means for comparing the integrated values of adjacent
rows and producing bipolar difference values therefrom;
weighting means for weighting the difference values of one polarity with a
predetermined factor which corresponds to the roughness of the particular
position in the image decreasing the difference values in a rough zone and
increasing the difference values in a smooth zone;
means for forming further difference values from the weighted difference
values to emphasize sharp-edge lines of the image; and
output means, including a row counter, for providing, by row counting, a
signal for correcting the position of the semiconductor element.
30. The apparatus of claim 29, comprising:
means for storing the scanning results for columns which are orthogonal to
the scanning direction by row number in which they occur indicating their
positions in the column direction; and
logic means for logically comparing the results transversely of the columns
to distinguish faulty results from correct results of the investigated
edge.
31. The apparatus of claim 29, wherein the semiconductor element is a
semiconductor chip having cut and system edges and at least one corner
which includes the cut and system edges, and wherein said imaging and
scanning means comprises:
a pair of image converters each having a scanning direction orthogonal to
the scanning direction of the other substantially parallel to the relevant
edges in a respective field of vision; and
an optic for imaging the corner of the chip on the image converters.
32. The apparatus of claim 31, and further comprising:
means for displacing one of said fields of vision along one side of the
chip for scanning;
means for producing like further difference signals from the displaced
field of vision; and
means for comparing the further difference signals of one of said fields
and said displaced field to obtain angle of rotation information.
33. The apparatus of claim 29, wherein the semiconductor element is a
semiconductor chip having cut and system edges and at least one corner
which includes the cut and system edges, and wherein said imaging and
scanning means comprises:
a single image converter for scanning the image substantially parallel to
one of the edges; and
an optical image rotation means for rotating the image for scanning
substantially parallel to the other edge. |
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Claims |
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Description |
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BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an opto-electronic, non-contact apparatus
and process for automatically recognizing the position of semiconductor
elements, preferably integrated circuits, in a manner which is largely
independent of pattern and surface properties, in particular for
adjustment purposes in automatic wire assembly equipment and for the
transfer of the semiconductor elements to automatic alloy/adhesive
equipment in which the semiconductor element is transferred from the wafer
to the system carrier.
2. Description of the Prior Art
Precise opto-electronic detection of dimensions, shape and position is
frequently impeded by the following circumstances:
(1) Insufficient contrast between the object and its environment;
(2) Considerable fluctuations in contrast both in respect of time and
location; and
(3) Considerable local differences in brightness in the surroundings of the
objects being investigated.
The German published application No. 2,404,183 describes and represents a
device for the recognition of the position of a pattern. This known device
has the disadvantage that the pattern recognition is type-specific, i.e.
it must be re-equipped for each new pattern or type. Moreover, these
patterns which fundamentally lie in the aluminum structure, change the
reflective properties due to technological fluctuations and, consequently,
impede a reliable recognition. Furthermore, this method of pattern
recognition is expensive.
SUMMARY OF THE INVENTION
The object of the present invention is to provide a process, and an
apparatus for carrying out the process, of the type generally set forth
above, which is independent of type, is largely independent of surface,
and can be implemented at a comparatively low expense.
Another object of the invention is to largely avoid the impeding
circumstances referred to above.
The above objects are achieved, according to the present invention, in that
the position of the semiconductor element, hereinafter simply chip, is
determined by way of the cut edge and system edge (and not via the
structure or pattern inside the chips) by means of a row-by-row scanning
which leads from the surroundings of the chip and moves across the chip,
where the rows run parallel, or virtually parallel, to the direction of
the investigated rectilinear edge and the instantaneous intensities of the
brightness values are integrated row-wise, or row-section-wise, the
resultant values are stored, and the difference in the results of
consecutive rows is formed. Then, only the polarity which corresponds to
the investigated edge (e.g. system edge bright/dark) is used for further
analysis. This result is also compared with a factor which corresponds to
the roughness of the relevant position in the image, the differences in a
rough zone are distinctly weakened and differences in a smooth zone are
distinctly emphasized, and an additional electronic width analysis is used
to emphasize sharp-edged lines (system edge, cut edge) from wide
junctions, and as a result, by means of a row counting process, a signal
for the correction of a position of the chip is formed and emitted. The
cut edge is the chip boundary formed by the scratching or sawing process
of the wafer. The system edge is the outermost regular structure of the
chip, which generally encloses the entire active surface of the chip in
the form of a quadrilateral structure and is generally formed as a result
of a junction from silicon to silicon oxide.
The present invention enables a position recognition process, which is
largely independent of pattern and thus of type, and which is not
influenced by reflection properties of the surface, to be carried out with
a high accuracy and speed.
In accordance with a further development of the invention, the
section-by-section analysis of the image contents is carried out in one or
more than one column(s) which are arranged beside one another or interlock
with one another and extend at right angles to the scanning direction. The
results of this column-by-column and row-by-row image processing which has
been explained above are stored, in respect of their position in the row
direction (row number), in a calculating unit, preferably a
microprocessor, and in this manner, by means of a corresponding logic
observation transverse to the columns, faulty results are distinguishes
from those results which have been correctly assigned to the investigated
edge. In this manner it is also possible to recognize the position of
chips which differ from their ideal form due to locally limited damage
(e.g. shell fracture) or as a result of disturbing particles. Moreover,
this realization results in an increased reliability of recognition. The
disturbances which are thus eliminated consist, in particular, of optical
disturbances resulting from the chip environment.
In accordance with a further development of the invention for determining
the angle and the two position coordinates of the chip, the process is
carried out in several, preferably three, field of vision with identical
or different, preferably orthogonal or scanning directions. This
realization serves to determine the translatory and slighty rotary
position deviation.
In accordance with a further development of the invention, in order to
determine the cut edge, a clearly defined optical image is produced by
exploiting the height dimension of the chip. This is carried out, for
example, in that a parallel illumination is used at a direction which is
inclined by a few degrees to the perpendicular and extends in the
projection to the chip surface approximately parallel to the diagonal, and
the observation is carried out at the reflection angle. The advantage of
this process is that along the cut edge it produces a narrow shadow seam
which appears absolutely dark and thus facilitates the recognition of the
cut edge in the described process.
In accordance with a further development of the invention, preferably a
parallel direct illumination is used to detect the system edge so that, as
a result of its inclination, the system edge reflects the light in such a
manner that it returns to the optical system in an only very slightly
weakened form and thus appears as a narrow, dark line. This illumination
also permits the system edge to be rendered sufficiently clearly visible
for an analysis purposes.
For the implementation of a process carried out in accordance with the
present invention, an optic is provided which preferably portrays a
sufficiently large portion of the corner of a chip onto two image
converters whose row-by-row scanning directions are orthogonal to one
another. This ensures that the edges always extend parallel, or
approximately parallel, to the scanning direction of the corresponding
image converter. A third field of vision which serves for the detection of
the angle of rotation is produced by methods of the second field of
vision. As a result of this arrangement, it is possible to use
commercially available television cameras for the row-by-row scanning.
However, it is also possible to use semiconductor image converters (e.g.
charge-coupled devices).
In accordance with a further development of the invention, only one image
converter can be provided and the second image edge can be detected by
optical image rotation. This embodiment of the invention has the advantage
of economy and increased operating reliability.
However, it is also possible to provide only one image converter, the
scanning directions of which are not predetermined. This obviates the need
for optical image rotation and a second image converter. For example,
image dissector tubes or random access semiconductor image converters are
suitable for this purpose.
Another object of the invention is to provide an increased recognition
reliability and a wider range of the detectable formation of system edges.
This purpose is served by a more effective electronic detection of the
roughness, as well as a logic monitoring of the results on the basis of an
orthogonality criterion as well as a form (or shape) examination of the
progression of the difference of the line-by-line integrals in the region
of the cut edge and the system edge. Moreover, in the position
determination for individual semiconductors and small integrated circuits,
the method is to be carried out in one television image through
utilization of two fields of vision arranged orthogonally on top of one
another by means of optical methods, such that the recognition time is
substantially shortened.
The above object is achieved in a particularly simple fashion by virtue of
the fact that, for the electronic detection of a rough region, electronic
signals, correspondingly allocated for each line, are generated due to the
fact that, preferably, a differentiation in the line-direction and a
following amount (or sum) formation as well as a line-integration, or
line-section-integration, respectively, takes place, and that these
results of the line-by-line allocated voltage values are brought into
different phase positions relative to one another, and that the latter are
preferably integrated by a sum formation. Through this expansion, rough
regions which manifest singular smooth locations, are better integrated
into a closed surface.
According to a further development of the invention, the system edge is
effected by means of a form (or shape) recognition of the line-by-line
integrals, or their differences, respectively, in the region of the cut
edge and system edge. This form recognition is most easily triggered via a
cut edge recognition. In order to determine the cut edge, parallel or a
different incident (vertical) illumination is employed which supplies
sufficient contours, in the case of the cut edge as well as in the case of
the system edge, due to the slopes or the reflection differences,
respectively, and the video signal from a line-by-line scanning, which
runs approximately parallel to the subject edges, is integrated in a
line-by-line fashion. In addition, the difference of successive
line-by-line integrals is formed and, subsequently, this result is
weighted with a signal which is proportional to the roughness, and the
signal resulting therefrom activates a maximum value detector (or minimum
value detector, respectively) by way of a comparator for determining the
cut edge on the basis of the line-by-line difference of the integrals,
and, by way of the result message, the cut edge is determined and,
triggered thereby, a minimal value detector (or maximum value detector,
respectively) determines the position of the system edge, likewise on the
basis of the progression of the difference of the line-by-line integrals.
It is thereby possible to discover system edges with greater certainty and
simultaneously with a less pronounced contour. In addition, the system
edge is permitted to manifest a universal character, such as, for example,
bright/dark/bright transition or dark/bright or bright/dark transitions,
respectively.
According to a further embodiment of the invention, in the case of a method
having three fields of vision, of which two of such fields of vision are
arranged, for example, on the longitudinal side and one on the transverse
side, in order to avoid false recognitions in each of the three fields of
vision, on the basis of two columns, respectively, one angle per field of
vision is calculated, and the results of the field of vision are compared
with one another. In addition, an angle can likewise be determined from
the two fields of vision at a longitudinal edge, and the latter angle can
be compared with the calculated angle from the transverse edge. Since the
system edge, and the cut edge of an integrated circuit, respectively,
extend orthogonally to one another, in a correct recognition these angles
must be equal. The primary requirement for an automatic position
recognition system, in addition to the recognition precision, is as low as
possible a rate of erroneously recognized systems which can lead to a shut
down of the machine. In order to avoid false recognitions, angle
considerations are utilized which have as a basis the orthogonal
progression of the cut edge, or the system edge, respectively.
In accordance with a further development of the | | |
