An apparatus and method for controlling a bit-mapped CRT raster display where a processor stores a bit-map of a CRT display frame in a buffer memory as strings of data words representative of bit-maps for single scan lines of the display. Associated with each string is a pointer which contains the starting address of the string which maps the next scan line. A controller accesses the buffer memory to output the data words of each string to a serializer in synchronism with the raster to generate a CRT video signal. After each string the controller accesses the buffer memory to get the pointer to the next string. In response to a initialization signal from the processor the controller obtains the pointer to the string associated with the first scan line from predetermined locations in memory. Alternatively the processor may directly load the controller with the initial pointer prior to each raster frame. The processor may share the buffer memory with the controller on a cycle-stealing basis to construct new strings. The processor may then easily modify the display by linking and unlinking old and new strings by simple modifications of pointers during the time between raster frames.

A word processing system having storge capability for storing words, each word comprising character line data and a scroll value. A character generator is provided for converting the character line data into a sequence of raster line data. A control addresses the character generator and varies the sequence of raster line data based on the scroll value. A display monitor is provided for converting the raster line data into physical raster lines for display.

A full page display device for a text processing system in which a text stream input by way of a keyboard is stored and displayed to the operator on a display device including a cathode ray tube, the electron beam of which is modulated and scanned in a series of horizontal traces to produce an image of the text line on the screen of the display device. The system comprises storage means which includes a plurality (four in a specific embodiment) of separate storage devices. In the specific embodiment, when the storage devices are accessed for display, one character is accessed simultaneously from the same location in each of the storage devices. The data is latched and coupled to a character generator to read out character dot pattern data which is latched and then interleaved with the data from other accessed character data by transferring the data one character at a time in parallel to a serializer. The data out of the serializer forms a serial bit stream which is coupled to the cathode ray tube to modulate the intensity of the beam in synchronism with the sweep to display the selected character data.

In a programmable controller linking system, a plurality of programmable controllers are connected to one master controller and sequences of the programmable controllers are programmed using addresses representing optional input/output memory areas. Link tables are prepared by automatically allotting input/output memory areas of the programmable controllers, to the inner relays, with respect to addresses of the respective programmable controllers except for the subject programmable controller, the thus prepared link tables are registered in the master controller, and all the link tables are collected from the respective programmable controllers in the master controller at the link starting time to prepare an editorial link table by collecting common portions of the collected link tables. The input/output side address tables are provided for the master controller and for the respective programmable controllers so that the data is periodically accessed and linked between the master controller and the respective programmable controllers in accordance with the input/output side address tables.

A video display terminal permitting substantially continuous scrolling of the display. Each character row of the display is stored in the display memory in a memory segment which also stores one or more parameter bytes associated with the character row. A first parameter byte portion indicates the number of the scan line on which the display of that character row is to commence during the current frame. A second parameter byte portion indicates the number of scan lines of that character row which are to be displayed during that frame. A memory address within the parameter bytes indicates the address of the memory segment storing the next character row to be displayed. This memory address is applied directly to the DMA controller. As a consequence, scrolling only requires a CPU interrupt during each vertical retrace interval to update the parameter byte information to increment and/or decrement the first scan line number and the number of scan lines and to link the memory segments as required when a row is scrolled completely off the display and when scrolling of a new row onto the display is initiated.