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Description  |
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BACKGROUND OF THE INVENTION
This invention relates to the field of musical instruments and tuners
therefor, and more particularly to a tuner having the capability of
shifting an entire scale instantly by predetermined scale increments.
Programmable musical instruments such as those described in U.S. Pat. No.
3,821,460 and No. 3,939,751 have been programmed by manually resetting the
appropriate switches in a bank of 120 switches per keyboard (manual or
pedal). In U.S. Pat. No. 4,085,645, instant scale changing capability was
added to such instruments by the use of DC programmable counters with DC
switching. In another U.S. Pat. No. 3,876,936, a visual frequency
comparator includes a CRT display device having a "split-screen". All of
the patents listed above are assigned to the same assignee as is the
present invention. Two audio frequencies can be compared on the screen by
causing each signal to produce a horizontal bar pattern on a respective
half of the screen. One set of bars is "synced" to provide a motionless
reference pattern. If the other set of bars is also motionless the two
frequencies being compared are either identical or have a relationship
which is the ratio of two whole numbers; e.g., 3:2, 2:1. The respective
numbers of bars denotes the frequency ratio, i.e., if three bars on the
"unknown" side of the screen occupy the same space as two bars on the
reference side, the ratio is 3:2 (the unknown frequency ratio is a perfect
fifth above the reference). Relative motion indicates by direction the
"sharp" or "flat" quality of the unknown frequency relative to the
reference. The reference tone is normally internally generated but, if
desired, another instrument can supply the reference.
A difficulty encountered with the above-described frequency comparator
tuning device derives from the fact that different musicians and musical
organizations vary in their choice of frequency for a given scale note.
Most scales are based on the choice of frequency for the note designated
"A" above middle "C".
The so-called "concert pitch" for this note is 440 Hz, but in actual use
the pitch of the "A" may vary several hertz, depending generally on the
conductor. It is therefore desirable to be able to tune "A" to any number
(usually an integer) of hertz (cycles per second) within a range of 435 Hz
to 446 Hz, and without manual reprogramming.
It is also desirable to shift the entire scale simultaneously without
affecting the set intervals. The semitone interval in Equal Temperament,
as in most music in the western world today, comprises a ratio of tones
1:1.06. For example, the frequency of "A#", the next note above "A", would
be 1.06 times the frequency of A, regardless of the actual frequencies
involved, 1.06 being the twelfth root of two and 2:1 being the ratio of an
octave interval.
SUMMARY OF THE INVENTION
It is therefore an object of this invention to provide a device for
accurately and easily comparing musical pitches and having the capability
of shifting the entire scale up or down instantly by a predetermined
increment.
This is accomplished in the circuit of the invention by a reference
oscillator coupled through a phase locked loop to a programmable divider.
The local oscillator in the PLL is designed to operate at a much higher
frequency than the frequency to be compared, therefore the feedback loop
of the PLL is coupled through the programmable divider and back to the
phase comparator of the PLL. The PLL output is also coupled to a chromatic
divider, controlled by a tone selector, and thence to octave dividers. The
interval and exact pitch-controlled signals provide the reference
frequency for the "synced" side of a split-screen frequency comparator.
BRIEF DESCRIPTION OF THE DRAWING
FIG. 1 is a partial block diagram of a partial circuit in accordance with
the invention.
FIG. 2 is a schematic/logic/block diagram of the circuit of FIG. 1.
FIG. 3 is a schematic diagram of the programmer of FIG. 1.
FIG. 4 is a schematic diagram of the tone select programmer which forms a
part of the chromatic divider of FIG. 1.
FIG. 5 is a schematic/logic diagram of the interconnections of the circuit
of FIG. 1 with the display device.
DETAILED DESCRIPTION OF A PREFERRED EMBODIMENT
FIG. 1 shows a block diagram form the circuitry to be coupled to the
circuit of FIG. 5 in order to provide the improved display device of the
invention.
As mentioned hereinabove, the original display device as claimed in U.S.
Pat. No. 3,876,936 allowed for the determination of an unknown musical
tone by means of a split-screen display including a bar generator. Bars on
the left side of the screen represented a reference frequency and those on
the right side the unknown frequency. While the reference frequency could
be chosen to be any keyboard tone (A, A#, G, C, etc.) there was no
provision in the patented device for changing "A" for example from the 440
Hz "standard" to 442 Hz.
In FIG. 1 a clock 10 will preferably be a crystal-controlled oscillator
operating at a relatively high frequency, for example, 3,581,600 Hz. When
this frequency is coupled through a divide-by-880 divider 12, the divider
output signal is 4,070 Hz. This output signal is coupled to a first input
14 of a PLL 16. The feedback loop of the PLL 16 is coupled to a second
input 17 through a programmed divider 18, controlled by programmer 20. The
PLL output is also coupled to a chromatic divider 22. A tone select means
24 is coupled to the chromatic divider 22 for selecting the desired tone
or note of the scale to be used as a reference tone on the display. One or
more choices of octave may be provided by octave dividers 26. The use of
octave dividers is, of course, optional and depends on the choices of
clock frequency, dividers, and the range of reference tones required.
FIG. 2 provides a more detailed version of the diagram of FIG. 1. The clock
10 includes a relatively inexpensive crystal 30 with a fine adjustment
capacitor 32, preferably having a range of 3-30 picofarads. One half of a
quad NOR gate 34a, 34b such as the Motorola MC14001 provides the
buffer/output circuit as shown.
The clock frequency 3,581,600 Hz is divided by two in a flip-flop 36 which
is preferably a Motorola MC14013 "D" type flip-flop. The Q output of the
flip-flop 36 is coupled to the clock input of a counter 38 which is
preferably a Motorola MC14040 binary counter. The counter 38 is programmed
by five diodes 40 and a resistor 42 to divide the input frequency by 440,
producing in this example an output of 4,070 Hz. In this type of binary
counter, with no resetting, the output at Q9 would be the input frequency
divided by 512 (2.sup.9); that is, outputs Q1 to Q9 would be at a "high"
or a logic one on every 512th count. With the diodes 40 coupling outputs
Q4-Q9 to the reset pin of counter 38, the input frequency will be divided
by 440. The 4,070 Hz output signal from Q9 is coupled to the input 14 of a
phase detector 44 in PLL 16. The PLL also includes a filter 46 and a VCO
48, and functions much as does the usual PLL except that the VCO 48 is
designed to operate at a frequency much higher than the 4,070 Hz input
(near 1.79 MHz) and the VCO output is coupled back to the input 17 of the
phase detector 44 through the programmed divider 18. It is known to use
such a connection to provide a series of "synthesized" frequencies.
The programmed divider 18 may be comprised of three cascade-connected
binary counters, the preferred choice being Motorola MC14516B up/down
counters, connected to count "down" only. In this application, the
counters are connected via points A-D to the programmer 20 (see FIG. 3) to
allow division of the VCO 48 output by one of a set of predetermined
numbers. As is known, dividing the output of the VCO of a PLL before
feedback to the phase comparator causes the VCO output to be the input
frequency multiplied by the divisor number. The divisor numbers are
established by the programmer 20 interconnections, which effectively
grounds selected ones of the first four data inputs of the divider 18
through a diode network 50. The predetermined divisor numbers are chosen
to provide the desired set of integral frequency values for the "A" above
middle "C" (435-446 Hz) and may be selected by means of a one-pole,
twelve-position switch 52.
For example, if A equals 440 Hz is desired, the fourth "D" data input of
the divider is grounded, the VCO output is divided by 440 (1,790,800)
divided by 440 equals 4070) and the VCO output signal is locked on
1,790,800 Hz. When this is divided by 2,035 (in chromatic divider 22) the
result is two times 440 or 880 Hz. If a value of only 435 Hz is desired
for "A," the programmable divider 18 will be programmed, via divider 18
inputs A, C and D, to divide the VCO output by 435, forcing the VCO output
to become 435 times 4,070 or 1,770,450 Hz. When this frequency is divided
by 2,035 in chromatic divider 22, the result is 2 times 435 or 870 Hz.
The chromatic divider 22 may also be comprised of three cascaded IC's,
preferably the Motorola MC14516B counters, as in the programmed divider
18. In this application, the appropriate divisor numbers for each scale
tone are chosen by means of the tone selector 24 (see FIG. 4). The tone
select function may be accomplished by a one-pole, twelve-position switch
54 and a network of diodes 56.
As mentioned hereinabove, if it is desired to have A equals 440 Hz as a
reference, all other tones or notes of the scale will be an integral
number of semitones removed from 440 Hz where the interval of a semitone
is 1:1.06. When the diode network 56 is properly designed, all tones of
the scale will be exactly tuned to the "A" chosen via switch 52 since the
semitone intervals remain the same regardless of the actual frequencies of
the tones.
As an example, if A equals 440 Hz, G will be two semitones lower or
approximately 392 Hz (391.995436), or 440 divided by N divided N, wherein
N is the twelfth root of 2. If A equals 435 Hz, G will be approximately
387.5 Hz or 435 divided by N.sup.2.
In this application, the output frequency of the chromatic divider 22 is
further divided by 2 and by 4 in the octave dividers 26, thus the output
terminals U and W will provide the most used range of musical tones; i.e.
the lowest value for "A" being 217.5 Hz and the highest value for G# being
842 Hz. The octave dividers 26 may be flip-flops such as the Motorola
MC14013.
It should be noted here that all frequency values and interval ratios given
herein are examplary only and are not to be construed as limiting the
invention.
FIG. 3 is a diagram of the diode network 50 and switching circuit of the
programmer 20. The switch 52 allows choice of the incremental (1.0 Hz)
values for "A" and the appropriate diode interconnections provide the
feedback loops in the programmed divider 18.
FIG. 4 is a drawing of the diode network and switching connections of the
tone selector 24. In operation, the switch 52 would be utilized first to
select the desired value for "A", then the various positions of the switch
54 would provide the corresponding frequency reference for each note of
the scale.
FIG. 5 is a rudimentary diagram of the interconnections to the audio and
video circuits of the visual display normally utilized in the invention.
The octave divider output terminals U and W are coupled through a
one-pole, two-position switch 60 and the phone jack 62 to an audio circuit
input terminal 64 and to one input of a video control circuit 66. The
phone jack 62 is included optionally in order to allow the use of the
comparator with an external reference such as a piano or other musical
instrument. The device is used in this manner for ear training.
The unknown or to-be-compared frequency may be picked up at a microphone
70, and amplified in an amplifier 72. The amplifier output is coupled to
one terminal of a one-pole, four-position switch 74, and also to a divider
76 which divides the microphone input frequency by 2, 4 and 8, these
divided outputs also being coupled to the switch 74, the switch output
being coupled to the video control circuit 64.
Thus there has been shown and described a circuit arrangement for
providing, in a musical pitch tuning device, instant scale shifting by
predetermined and exact increments. The embodiment shown is given as an
illustration only, to further the understanding of the invention, and is
not to be construed as limiting the scope of the invention. It is intended
to cover all such variations and modifications as fall within the spirit
and scope of the appended claims.
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