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Noise tolerant multiplex system
   
Document Number
US Patent 4276640
Issued Date
June 30, 1981
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Abstract
A noise tolerant time division multiplex system including a transmitter and receiver, each constructed as a monolithic integrated circuit and interconnected by a serial data wire. Data as well as power is supplied to the transmitter from a plurality of parallel connected input switches. The transmitter includes a parallel in/serial out shift register controlled by timing logic and further includes a tri-state driver for generating a three-level serial output signal indicative of the status of the input switches. The data is generated at a high rate to eliminate any deleterious effects of noise on the system. The receiver chip receives a regulated energizing potential from the transmitter chip over two additional wires, generates a timing signal from the three-level signal and loads the data in binary format into a serial in/parallel out shift register. When the data is properly positioned in the receiver register the data is transferred to latches which energize appropriate relays to control the direction of rotation of various motors controlling the seats, windows and door locks of an automobile.
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Noise tolerant multiplex system - US Patent 4276640 Drawing
Drawing from US Patent 4276640
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Number of Claims:
6
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Owner
Published
June 30, 1981
Application Number
06/054,021
Filed
July 2, 1979
US Classification
370/360   370/465 370/514
Int'l Classification
G08C   15/12   (20060101)   H04B   15/00   (20060101)   H04L   25/49   (20060101)   G08C   15/00   (20060101)   B60R   16/02   (20060101)  
Examiner
Attorney/Law Firm
USPTO Field of Search
370/77   370/91   370/112   370/100   370/85   370/79   340/147CN   340/147CV   340/163   340/167R   371/30  
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