A digital-to-digital converter is arranged to provide "decimated" output samples at rate f.sub.0, each of which represent a group of input samples received at a rate m times greater. Each output is generated using overlapped triangularly weighted accumulation on an interval including 2m preceding input samples. The samples near the beginning and end of each accumulation interval receive the smallest weight, and the samples at the middle of the interval receive the greatest weight. The converter is achievable in integrated circuit form using first and second serially connected accumulators, the first accumulating m input samples without weighting and the second being used to weight the samples so that the first receives m times the weight of the last sample. The output of the first accumulator is increased in scale by the factor "m" and the output of the second accumulator subtracted therefrom. The difference is delayed so that the next m samples may be accumulated. The output of the second accumulator is then combined with the delayed subtractor output to yield the desired overlapped, triangularly weighted accumulation.
Fractional rate modulation conversion is accomplished by separating incoming data into frames of bits. Each frame is partitioned into bit words of unequal bit lengths. The words are divided by a modulus to obtain remainders. The remainders are then multiplexed into sequential bauds of common modulus. The apparatus can be used for data compression as well as efficient modulation in bandwidth restricted channels.
A digital resampling system is provided for converting a first digital signal to a second digital signal, where both signals represent the same analog signal but sampled at two different clock rates which are not phase-locked together. A filter is clocked by the first clock and outputs filtered samples at the first clock rate, optionally omitting samples which will not be used. A phase indicator determines the relative phase position of the first and second clocks and indicates an integer phase value and a fractional phase value which together indicate where a tick of the second clock falls among the ticks of the first clock. The integer phase value identifies a clock cycle of the first clock in which a tick of the second clock occurs, and the fractional phase value represents a fraction identifying a position of the tick of the second clock within the clock cycle of the first clock. A sample selector selects M filtered samples from those provided by the non-decimating filter based on the integer phase value. A weight generator generates M weights based on the fractional phase value, and a weight averager weights the M filtered samples by the M weights, and outputs a sum or an average of the weighted samples. The resampler is applicable to digital-to-digital resampling, as well as resampling in an analog-to-digital or digital-to-analog conversion system.
A method of and apparatus for the conversion of a frequency modulated signal to a digital output are disclosed. The output of the converter is a triangularly weighted sum of the number of zero crossings of the F.M. signal in each sub-sampling interval over a sampling interval T.
A conversion method converts a first digital signal having a first sampling period to a second digital signal having a second sampling period which is different from the first sampling period. The method comprises four steps. In the first step, the first digital signal is oversampled. In the next step, the sample value of the oversampled signal maintains an identical value during a short period corresponding to a common multiple of the first sampling period and the second sampling period. In the third step, an interpolation process is carried out. Finally, the second digital signal is outputted by sampling at the second sampling period.
An A-D converter which oversamples the input analog signal, at a frequency greater than the Nyquist frequency, and achieves high precision linear coding by performing simple operations at a high sampling frequency f.sub.H while complicated operations are performed at a low sampling frequency f.sub.s. The high sampling frequency may be reduced to the low sampling frequency through a two-step reduction using a sampling frequency converter to reduce the frequency to an intermediate frequency f.sub.M and an integrator/sampler to reduce the sampling frequency further to f.sub.s or directly with the use of an FIR filter having a frequency characteristic in which attenuation is large in the out-of-band and gain deviation is small in-band.