A digital-to-analog converter is provided which converts a series of digital binary numbers into an analog signal having an amplitude proportional to the values of the binary numbers. The disclosed embodiment of this invention includes a segment generator having input terminals coupled to receive the most significant digits of the binary numbers to be converted, wherein the segment generator provides a first signal proportional to the values of the most significant digits of the binary numbers. A step generator is also included which receives the remaining lesser significant digits of the binary number and provides a second signal proportional to the values of these lesser significant digits of the same binary numbers. Additionally, means for combining the first and second signals is provided to form an analog signal proportional to the value of the binary number to be converted.
A digital audio system for high-fidelity replication of wideband audio material. The system comprises a high-speed, low-noise and low-distortion, digital-to-analog converter including means for reducing spurious switching currents in the reconstructed audio signal. Such a converter is employed in both the encoding and decoding portions of the system.
In a digital to analog converter, a circuit for improving the performance of digital to analog converters by reducing and minimizing the variation in analog ground current is disclosed. The resulting digital to analog converter has reduced variation in output signal, the digital to analog converter can provide a more accurate representation of the input digital signal.
A reset circuit for resetting one or more data latches of a digital-to-analog converter includes an output transistor for sinking current from the latches. An input transistor is biased by a high-low input enabling one of a differential pair of transistors that drive the output transistor. The current used to drive the output transistor is clamped by a clamping transistor.
A digital to analog converter circuit includes a current supply for providing a plurality of output currents of substantially equal magnitudes, a subtractor circuit coupled with selective outputs of the current supply for producing a plurality of binary weighted output currents and a summing circuit which is responsive to a binary coded digital input signal for selectively summing the binary weighted output currents and the remaining equal magnitude currents to provide a representative analog output current. The converter circuit is suited to be operated from a single source of power supply and does not require resistor trimming.
The present invention relates to a digital-to-analog converter providing two complementary output signals varying inversely with respect to each other and by steps according to a digital datum to be converted, including circuitry for offsetting by one step the variation characteristic of one of the output signals.
