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Interpolative digital-to-analog converter for linear PCM code
   
Document Number
US Patent 4321585
Issued Date
March 23, 1982
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Abstract
A digital-to-analog converter which is effective for an interpolative decoder for decoding a linear PCM signal is disclosed. An output signal of a binary rate multiplier which develops signals of several less-significant bits of the linear PCM signal onto a time axis is directly applied to a driver circuit, by which is driven the segment of a ladder resistance network corresponding to the least significant bit, the ladder resistance network having segments corresponding to signals of several more-significant bits of the linear PCM signal. Thus, an adder for the digital addition between the output signal of the binary rate multiplier and the signals of the several more-significant bits is dispensed with.
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Interpolative digital-to-analog converter for linear PCM code - US Patent 4321585 Drawing
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Number of Claims:
5
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Owner
Hitachi, Ltd. (Tokyo,JP)
Published
March 23, 1982
Application Number
06/069,063
Filed
August 23, 1979
US Classification
341/145   341/154
Int'l Classification
H03M   1/00   (20060101)  
Attorney/Law Firm
Priority Data
Aug 23, 1979 [JP] 53/114652[U]
USPTO Field of Search
340/347M   340/347DA   370/7   370/109  
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