A data driven processor for searching data stored in memory to identify messages or other data containing operator selected keywords containing alpha-numeric or other characters and for performing arithmetic and other functions performed by processors. The processor comprises a plurality of commercially available integrated circuit random access memories (RAMs). The binary words read out of the RAMs are applied to the higher order addressing inputs of the same RAMs. Messages being searched for keywords are applied to the lower order addressing inputs of the same RAMs. A binary word applied to the higher order addressing inputs of the RAM memory selects a block of memory bits with each bit being associated with a different character. Only the memory bit within a selected block of memory bits corresponding to the keyword character being searched for contains a binary word indicating the block of bits for the subsequent keyword character to be searched for. When a character being searched for is detected, the binary word in the corresponding memory location is read out and applied to the higher order memory inputs. This causes the next block of memory bits to be addressed to await receipt and detection of the next keyword character. After detecting all the characters of a keyword or keywords an output from the RAM memory is used to transfer the stored message containing the selected keyword or words to the output device for operator review.
An I/O prescription table (I/O PTBL) is associated with a processing program module that is executed by a conventional sequential execution type processor. Each processing program module fetches the input data according to its associated I/O PTBL and stores the output data in the same table. An execution control program makes reference to the I/O PTBL associated with the processing program module, updates the designated I/O PTBL so as to indicate that the corresponding input data is prepared, and starts the processing program module associated with the I/O PTBL which is furnished with all of the necessary input data.
A data driven type information processor includes a data driven type information processing unit, and a download unit. The information processing unit includes a program storing unit and an input/output control unit of a data packet for storing information stored in a data packet including a load instruction into the program storing unit and for carrying out a data driven type process on data packets including other instructions according to information stored in the program storing unit. The download unit downloads program data to the information processing unit by applying a data packet including the load instruction and program data to be stored in the program storing unit. The download unit includes a memory for storing program data, a readout circuit for reading out a set of program data stored in the memory, and a packet generation circuit for generating a data packet including the load instruction and readout program data to provide the same to the input/output control unit of the information processing unit. The memory may store a plurality of sets of program data.
A data-driven processor which has a packet assembling unit to add a tag information to the sequentially inputted data when the input data has no tag information, such as destination address or the like, thereby enabling the data to be inputted without using an external circuit, such as a host processor, and improving the data input rate and which also has a packet outputting and rearranging unit for rearranging an output packet stream in a predetermined order to thereby output the data information only, so that it is possible that the data is outputted without any external circuit, such as a host processor, the output rate is improved and the data output is executed in a predetermined order.
According to the present invention, a file recovery system is provided in which the commands for recovering files such as a historical file are unnecessitated and the recovery system configuration is independent of the host processing system. That is, since the equipment for achieving a file recovery does not have information about the location of the recovery data, information about the content of a file to be recovered is transmitted to a transmission line. The other equipments asynchronously receive the information and judges whether or not a file containing the same content exists in the own system. If its file exists, the content of the file is transmitted to the transmission line. The equipment achieving the file recovery asynchronously receives from the transmission line the file data of files such as a historical file and establishes data consistency by use of the buffered current data and the event number, thereby recovering files such as a historical file.
A data-driven processor which has a packet assembling unit to add a tag information to the sequentially inputted data when the input data has no tag information, such as destination address or the like, thereby enabling the data to be inputted without using an external circuit, such as a host processor, and improving the data input rate and which also has a packet outputting and rearranging unit for rearranging an output packet stream in a predetermined order to thereby output the data information only, so that it is possible that the data is outputted without any external circuit, such as a host processor, the output rate is improved, and the data output is executed in a predetermined order.
