A high frequency converter of push-pull form comprises a center tapped D.C. input supply 16, 17, 18, two solid state switching devices (20, 21) connected in series across the D.C. input terminals, a load circuit including a supersonic frequency transformer 30 and an output rectifier 35, and an oscillatory circuit including at least one capacitor 40 and a parallel inductor 34 connected in parallel with the primary winding 37 of the transformer between the center tapping 19 of the supply and the junction 25 of the switching devices. The switching devices are synchronized to the oscillation of the oscillatory circuit to allow the circuit to oscillate freely for part of a cycle to transfer energy from the inductor 34 to the capacitor 40 to charge the latter to a certain condition in which the voltage across the parallel inductor is substantial and that across the switching device is negligible and only then connect the parallel inductor across the D.C. input terminals whereupon the parallel inductor receives and stores energy from the said supply. Means such as a saturable reactor 33 are connected in series in the load circuit to restrict load current to a low value during a part of the cycle in which the capacitor receives energy from the parallel inductor and until the capacitor is charged to the said condition and the switching means has connected the load circuit across the supply.
A PWM power converter includes a first switching branch of a first switching device and a first inductor between a positive source terminal and a load terminal and a second switching branch of a second inductor and a second switching device between the load terminal and a negative source terminal. To reduce noise and loss, the power converter is further provided with a series combination of third and fourth capacitors connected between the positive and negative source terminals, a series combination of first diode and first capacitor connected between a first junction point between the third and fourth capacitors and a second junction point between the first switching device and the first inductor, a series combination of second capacitor and second diode connected between a third junction point between the second inductor and the second switching device and a fourth junction point between the third and fourth capacitors, a series combination of third diode and third inductor connected between a fifth junction point between the first diode and the first capacitor and the positive source terminal, and a series combination of fourth inductor and fourth diode connected between the negative source terminal and a sixth junction point between the second capacitor and the second diode.
In a current limiter with electric valves for limiting a short circuit in an electric power supply, wherein two throttles are connected in series and in a parallel path with two series-connected valves, which are disposed in opposition to each other and the two parallel paths are interconnected by a connection extending between the common potential point of the valves and that of the throttles, the valves are semi-controlled valves, which, for the operation of the current limiter, are activated by an external control whereby the valves are converted from a conductive to a blocking state in which they remain so that the current limiter automatically limits the current upon the occurrence of a fault current exceeding a predetermined current threshold.
A dual-switch transformer-coupled switching regulator is provided with a non-dissipative snubber circuit arrangement wherein the resonant elements thereof include an inductor serially connected between two capacitors through a diode switch. The snubber has two other diode switches that are connected on mutually exclusive ones of the same sides of the capacitors that are connected to the inductor. Each of the last two mentioned diode switches connects the respective aforementioned side of the particular capacitor to the outer main terminal of a mutually exclusive one of the dual transistor switches of the regulator. The other side of the particular capacitor is connected to the other main terminal of the other one of the dual transistor switches. The arrangement minimizes any deleterious effects caused when the dual switches are being switched.
In a power-line-operated high-frequency electronic fluorescent lamp ballast, an inverter is powered from a DC supply voltage having a substantial amount of 120 Hz ripple. The fluorescent lamp is connected with the inverter's squarewave output voltage by way of a series-resonant L-C circuit. The amount of power supplied to the fluorescent lamp at any given moment depends on two significant factors: (i) the instantaneous magnitude of the DC supply voltage, and (ii) the instantaneous frequency of the inverter's squarewave output voltage. Arrangements are provided whereby the instantaneous inverter frequency is automatically adjusted over the duration of the 120 Hz ripple cycle such as to maintain the power supplied to the lamp substantially constant during this ripple cycle. As a result, in spite of a relatively large amount of ripple, the lamp current crest factor is maintained relatively low and substantially constant.
In an inverter-type power supply, a self-oscillating full-bridge inverter is powered by unfiltered full-wave-rectified 120 Volt/60 Hz power line voltage and controllably triggered into oscillation each half-cycle of the power line voltage by way of triggering two of the bridge's four transistors into conduction simultaneously. This is accomplished by way of discharging a charged-up capacitor by way of a Diac through a special trigger winding on each of two saturable current feedback transformers; each of which controls a pair of the bridge transistors.
